MT28C256532W18S Micron Semiconductor Products, Inc., MT28C256532W18S Datasheet

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MT28C256532W18S

Manufacturer Part Number
MT28C256532W18S
Description
256Mb Multibank Burst Flash 32Mb/64Mb Async/page Cellularram Combo, 88-Ball Fbga
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet
FLASH AND CellularRAM
COMBO MEMORY
Features
• Stacked die Combo package
• Basic configuration
• F_V
• Asynchronous access time
• Page Mode read access
• Burst Mode Read Access
• Enhanced suspend options
• Each Flash contains two 64-bit chip protection
• Flash PROGRAM/ERASE cycles
• Cross-compatible command set support
09005aef80bcd58d
MT28C256564W18S_A.fm - Rev. A, Pub 6/03 EN
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE SUBJECT TO CHANGE BY
Includes two 128Mb Flash devices
Choice of either one 32Mb or one 64Mb
Flash
CellularRAM
1.70V (MIN)/1.95V (MAX) F_V
1.70V (MIN)/2.24V (MAX) V
1.80V (TYP) F_V
12V ±5% (HV) F_V
Flash/CellularRAM access time: 60ns @ 1.70V V
Interpage read access: 60ns @ 1.8V F_V
Intrapage read access: 20ns @ 1.8V F_V
Max Operating Frequency: 66 MHz
Flash Initial Latency: 60ns @ 1.8V F_V
CellularRAM Initial Latency: 60ns @ 1.8V PS_V
t
ERASE-SUSPEND-to-READ within same bank
PROGRAM-SUSPEND-to-READ within same bank
ERASE-SUSPEND-to-PROGRAM within same bank
registers for security purposes
100,000 WRITE/ERASE cycles per block
Extended command set
Common Flash interface (CFI) compliant
MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S PRODUCTION DATA SHEET SPECIFICATIONS.
ACLK: 11ns @ 1.8V Vcc
CellularRAMÔ device
Flexible multibank architecture
8 Meg x 16 Async/Page/Burst interface
Support for true concurrent operations with
no latency
Low-power, high-density design
2 Meg x 16 or 4 Meg x 16 configurations
Async/Page
accelerated programming algorithm [APA]
activation)
CC
, V
CC
Q, F_V
PP
PP
PP
(in-system PROGRAM/ERASE)
, PS_V
(in-house programming and
CC
CC
voltages
CC
Q
, PS_V
32Mb/64Mb ASYNC/PAGE CellularRAM COMBO
CC
CC
CC
CC
/66 MHz
, PS_V
, PS_V
CC
/66 MHz
CC
CC
CC
1
256Mb MULTIBANK BURST FLASH
Options
• Timing
• Burst Frequency
• Boot Block Configuration
• Operating Voltage Range
• Operating Temperature Range
• Package
MT28C256532W18S
MT28C256564W18S
Low Voltage, Wireless Temperature
60ns
70ns
66 MHz
54 MHz
Top/Top
Top/Bottom
Bottom/Top
Bottom/Bottom
PS_V
Wireless Temperature (-25°C to +85°C)
88-ball FBGA
(8 x 10 grid with eight support balls)
MT28C256564W18S-705 BBWT
CC
1.70V–1.95V
M
A
B
C
D
G
H
K
E
F
J
L
Figure 1: 88-Ball FBGA
PS_OE#
F_CE#1
PS_V
NC
A4
A5
A3
A2
A1
A0
NC
NC
1
SS
Part Number Example:
PS_LB#
F_OE#1
V
A18
A17
DQ8
DQ0
NC
A7
A6
NC
NC
SS
2
Q
PS_UB#
V
DQ2
DQ1
DQ9
A19
A23
NC
NC
NC
CC
3
Q
PS_V
PS_V
F_WP#
F_RP#
F_VCC
F_V
DQ10
DQ11
(Ball Down)
DQ3
NC
Top View
4
PP
SS
SS
PS_WE#
F_WE#
PS_V
PS_V
F_V
ADV#
DQ12
DQ5
DQ4
NC
5
CC
CC
SS
PS_CE#
F_V
DQ13
DQ14
F_V
V
A20
DQ6
CLK
A8
SS
6
CC
CC
Q
WAIT#
DQ15
V
F_V
A21
A22
A10
A14
DQ7
NC
A9
NC
CC
7
Q
SS
©2003 Micron Technology, Inc.
PS_ZZ#
PS_V
V
A11
A12
A13
A15
A16
NC
NC
NC
NC
CC
8
ADVANCE
Q
SS
Marking
WT
-60
-70
BB
TT
TB
BT
FT
18
6
5

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MT28C256532W18S Summary of contents

Page 1

... PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S PRODUCTION DATA SHEET SPECIFICATIONS. 256Mb MULTIBANK BURST FLASH 32Mb/64Mb ASYNC/PAGE CellularRAM COMBO ™ MT28C256532W18S MT28C256564W18S Low Voltage, Wireless Temperature , PS_V CC ...

Page 2

Table of Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

List of Figures Figure 1: 88-Ball FBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

List of Tables Table 1: Cross-Reference for Abbreviated Device Marks ...

Page 5

... General Description The MT28C256532W18S/MT28C256564W18S com- bination Flash and CellularRAM is a high-performance, high-density, memory solution that can significantly improve system performance. The Flash architecture features a multipartition configuration that supports READ-while-PROGRAM/ERASE operations with no latency. An 8Mb partition size enables optimal design flexibility. Two Flash devices are stacked to achieve the 256Mb density ...

Page 6

Parameter Blocks – Top Boot (128Mb to 256Mb) NOTE: Figure 2 shows a BT (bottom/top) dual Flash configuration. 09005aef80bcd58d MT28C256564W18S_A.fm - Rev. A, Pub 6/03 EN 256Mb MULTIBANK BURST FLASH 32Mb/64Mb ASYNC/PAGE CellularRAM COMBO Figure 2: Flash Memory Map Main ...

Page 7

F_OE# F_CE# F_WE# ADV# A0–A23 PS_CE# PS_ZZ# PS_OE# PS_WE# 09005aef80bcd58d MT28C256564W18S_A.fm - Rev. A, Pub 6/03 EN 256Mb MULTIBANK BURST FLASH 32Mb/64Mb ASYNC/PAGE CellularRAM COMBO Figure 3: Block Diagram FLASH #1 Bank 0 8,192K ...

Page 8

... Instead, an abbreviated device mark com- Table 1: Cross-Reference for Abbreviated Device Marks PRODUCT PART NUMBER MT28C256532W18SFT-705 BTWT MT28C256532W18SFT-705 TTWT 09005aef80bcd58d MT28C256564W18S_A.fm - Rev. A, Pub 6/03 EN 256Mb MULTIBANK BURST FLASH 32Mb/64Mb ASYNC/PAGE CellularRAM COMBO â stan- prised of a five-digit alphanumeric code is used ...

Page 9

... CE Select/Special Mark S = Single CE Flash with Asynchronous PSRAM Table 2: Valid Part Number Combinations PART NUMBER MT28C256532W18SFT-705 BTWT MT28C256532W18SFT-705 TTWT 09005aef80bcd58d MT28C256564W18S_A.fm - Rev. A, Pub 6/03 EN 256Mb MULTIBANK BURST FLASH 32Mb/64Mb ASYNC/PAGE CellularRAM COMBO Valid combinations of features and their correspond- ing part numbers are listed in Table 2. ...

Page 10

Table 3: Ball Descriptions 88-BALL FBGA NUMBERS SYMBOL B1, B2, B3, B7, B8, A0–A23 C1, C3, C7, C8, D1, D2, D7, D8, E1, E2, E6, E7, E8, F1, F2, F6, F7, F8 F_CE# J2 F_OE# F5 F_WE# E4 ...

Page 11

Boot Configurations The possible configurations for Flash die are shown in Table 4 below. This table shows the possible config- urations of the two Flash devices for either top boot or bottom boot. Table 4: Possible Boot Configurations for Flash ...

Page 12

Table 5: Truth Table FLASH SIGNALS MODES F_CE# F_OE# F_WE# F_RP# ADV# WAIT# Read Write Standby Output Disable Reset Read Flash must be in High-Z ...

Page 13

Flash Electrical Specifications Table 6: Absolute Maximum Ratings PARAMETERS/CONDITIONS Voltage to any ball except Voltage PP V Supply Voltage Supply Voltage CC Output Short Circuit Current Operating Temperature Range Storage Temperature ...

Page 14

Table 10: DC Characteristics Notes appear following table; all currents are in RMS unless otherwise noted PARAMETER Input Low Voltage Input High Voltage Output Low Voltage I = 100µA OL Output High Voltage I = -100µ Lockout Voltage ...

Page 15

Table 10: DC Characteristics (continued) Notes appear following table; all currents are in RMS unless otherwise noted PARAMETER F_V Program Current PP F_V = F_V , Program in Progress F_V = F_V , Program in Progress 2 ...

Page 16

Table 11: CFI OFFSET DATA 00 2Ch Manufacturer code 01 44C6h Top boot block device code 44C7h Bottom boot block device code 02 – 0F reserved Reserved 10, 11 0051, 0052 “QR” 12 0059 “Y” 13, 14 0003, 0000 Primary ...

Page 17

Table 11: CFI (continued) OFFSET DATA 3E 00E6 Optional Feature and Command Support 3F 0003 Bit 0 Chip erase supported 0000 Bit 1 Suspend erase supported = yes = 1 41 0000 Bit 2 Suspend program ...

Page 18

Table 11: CFI (continued) OFFSET DATA 5D Top: 0064 Partition 1 (erase block type 1) Bot: 0064 5E Top: 0000 Partition 1 (erase block type 1) Bot: 0000 5F Top: 0001 Partition 1 (erase block type 1) bits per cell; ...

Page 19

Table 11: CFI (continued) OFFSET DATA Top: 6B Top: 0064 Partition 2 (erase block type 1) Bot: 73 Bot: 0064 Top: 6C Top: 0000 Partition 2 (erase block type 1) Bot: 74 Bot: 0000 Top: 6D Top: 0001 Partition 2 ...

Page 20

SEATING PLANE C 0.10 C 88X Ø 0.35 SOLDER BALL DIAMETER REFERS TO POST REFLOW CONDITION. THE PRE-REFLOW DIAMETER IS Ø 0.35 BALL A8 8.80 4.40 ±0.05 0.10 (4X) 2.80 ±0.05 9.00 ±0.10 NOTE: 1. All dimensions in ...

Page 21

Revision History • Original document, Rev ...

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