MT54W1MH18B Micron Semiconductor Products, Inc., MT54W1MH18B Datasheet - Page 21

• Manufacturer Part Number: MT54W1MH18B
• Description: 18Mb Qdrii SRAM, 1.8V Vdd, Hstl, 2-Word Burst,
• Manufacturer: Micron Semiconductor Products, Inc.

IDCODE
32-bit code to be loaded into the instruction register. It
also places the instruction register between the TDI
and TDO balls and allows the IDCODE to be shifted
out of the device when the TAP controller enters the
Shift-DR state. The IDCODE instruction is loaded into
the instruction register upon power-up or whenever
the TAP controller is given a test logic reset state.
SAMPLE Z
scan register to be connected between the TDI and
TDO balls when the TAP controller is in a Shift-DR
state. It also places all SRAM outputs into a High-Z
state.
SAMPLE/PRELOAD
tion. The PRELOAD portion of this instruction is not
implemented, so the device TAP controller is not fully
1149.1-compliant.
18Mb: 1.8V V
MT54W1MH18B_H.fm – Rev. H, Pub. 3/03
The IDCODE instruction causes a vendor-specific,
The SAMPLE Z instruction causes the boundary
SAMPLE/PRELOAD is a 1149.1 mandatory instruc-
DD
, HSTL, QDRIIb2 SRAM
21
2 MEG
is not implemented, putting the TAP into the Update-
DR state while performing a SAMPLE/PRELOAD
instruction will have the same effect as the Pause-DR
command.
BYPASS
instruction register and the TAP is placed in a Shift-DR
state, the bypass register is placed between the TDI
and TDO balls. The advantage of the BYPASS instruc-
tion is that it shortens the boundary scan path when
multiple devices are connected together on a board.
Reserved
reserved for future use. Do not use these instructions.
Note that since the PRELOAD part of the command
When the BYPASS instruction is loaded in the
These instructions are not implemented but are
1.8V V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
X
8, 1 MEG
DD
, HSTL, QDRIIb2 SRAM
X
18, 512K
©2003 Micron Technology, Inc.
X
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