MCMC68HC05L16 Freescale Semiconductor, Inc, MCMC68HC05L16 Datasheet - Page 95

• Manufacturer Part Number: MCMC68HC05L16
• Description: M68hc05 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 10
LCD Driver
10.1 Introduction
The liquid crystal display (LCD) driver may be configured with four backplanes (BP) and 39 frontplanes
(FP) maximum. The V
are applied from VLCD1, VLCD2, and VLCD3 inputs.
On reset, LCD enable bit (LCDE) in the LCD control register (LCDCR) is cleared (LCD drivers at a
disabled state) and all BP pins and FP pins output V
The LCD clock is generated by the timebase module, and the LCLK bit in the TBCR1 selects the clock
frequency.
10.2 LCD Waveform Examples
Figure
Freescale Semiconductor
10-1,
Figure
DUTY = 1/1 (STATIC)
BIAS = 1/1 (VLCD1 = V
BP0–FPx
BP0–FPy
(XXX1)
(XXX1)
(OFF)
(ON)
BP0
FPx
FPy
10-2,
DD
Figure 10-1. LCD 1/1 Duty and 1/1 Bias Timing Diagram
1FRAME
voltage is the highest level of the output waveform and the lower three levels
Figure
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
10-3, and
DD
, VLCD2 = VLCD3 = V
Figure 10-4
DD
DD
–VLCD)
illustrate the LCD timing examples.
levels.
V
VLCD2, 3
V
VLCD2, 3
V
VLCD2, 3
+VLCD
0
–VLCD
+VLCD
0
–VLCD
DD
DD
DD
, VLCD1
, VLCD1
, VLCD1
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