MCMC68HC05L16 Freescale Semiconductor, Inc, MCMC68HC05L16 Datasheet - Page 56

• Manufacturer Part Number: MCMC68HC05L16
• Description: M68hc05 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Parallel Input/Output (I/O)
6.5.1 Port D Data Register
Read
Write
Reset
6.5.2 Port D MUX Register
Read
Write
Reset
PDMx — Port D MUX Control bit x
6.6 Port E
Port E pins serve one of two basic functions depending on the MCU mode selected:
Since port E is an output-only port, there is no DDRE register. Instead of DDRE, port E MUX control
register (PEMUX) is used. Bits 7–0 of this register control the port/LCD muxing of port E bits 7–0
respectively on a bit-wide basis. These bits are cleared on reset, and writing a logic 1 to any bit will turn
that pin into a port output. This function is superseded by the PEH and PEL bits in the LCD control register.
When PEH is set, the upper four bits of port E become port outputs regardless of the state of the PEMUX
bits. Likewise, when PEL is set, the lower four bits of port E become outputs.
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Anytime; returns output data latch; bit 0 is always read logic 1
Anytime (Writes do not change pin state when configured for LCD driver output.)
All bits set to logic 1 and output ports disconnected from the pins (LCD is enabled on reset.)
Anytime (When OPTM = 1, bits 3–0 always read logic 0.)
Anytime (Writes have no effect if PDH is set.)
All bits cleared; LCD enabled
•
•
0 = Configure pin PDx to LCD
1 = Configure pin PDx to output
LCD frontplane driver outputs
General-purpose output pins
Address:
Address:
Reset:
Reset:
Read:
Read:
Write:
Write:
Option Map — $0003
$0003
PDM7
Bit 7
PD7
Bit 7
1
0
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
Figure 6-8. Port D MUX Register (PDMUX)
Figure 6-7. Port D Data Register (PORTD)
PDM6
PD6
6
1
6
0
PDM5
PD5
5
1
5
0
PDM4
PD4
4
1
4
0
PD3
3
1
3
0
0
PD2
2
1
2
0
0
PD1
1
1
1
0
0
Freescale Semiconductor
Bit 0
Bit 0
1
1
0
0