MCMC68HC05L16 Freescale Semiconductor, Inc, MCMC68HC05L16 Datasheet - Page 55

• Manufacturer Part Number: MCMC68HC05L16
• Description: M68hc05 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

6.4.2 Port C Data Direction Register
Read
Write
Reset
DDRCx — Port C Data Direction Register Bit x
6.5 Port D
Port D pins serve one of two basic functions depending on the MCU mode selected:
Since port D is an output-only port, there is no DDRD register. Instead of DDRD, port D MUX control
register (PDMUX) is used. Bits 7–4 of this register control the port/LCD muxing of port D bits 7–4,
respectively, on a bit-wide basis. These bits are cleared on reset, and writing a logic 1 to any bit will turn
that pin into a port output. This function is superseded by the PDH bit in the LCD control register. When
PDH is set, the upper four bits of port D become port outputs regardless of the state of the PDMUX bits.
On reset, all port D outputs are disconnected from the pins and the port D data latches are set to a logic 1.
The pin connections of the lower three bits of port D depend on the LCD duty selection by the DUTY1 and
DUTY0 bits in the LCDCR. When the LCD duty is not 1/4, the unused backplane driver(s) is (are) replaced
by the port D output pin(s) automatically.
If DWOMH bit or DWOML bit in the WOM1 register is set, the P-channel drivers of output buffers at the
upper four bits or lower three bits, respectively, are disabled (open-drain mode). These open-drain
controls do not apply to the pins which are configured as frontplane or backplane driver outputs.
Freescale Semiconductor
Anytime when OPTM = 1
Anytime when OPTM = 1
Cleared to $00; all general-purpose I/O configured for input
The timer and SSPI force the I/O state to be an output for each port C line associated with an enabled
output function such as SDO and EVO. For these cases, the data direction bits will not change.
•
•
0 = Configure I/O pin PCx to input
1 = Configure I/O pin PCx to output
LCD frontplane and backplane driver outputs
General-purpose output pins
Address:
Reset:
Read:
Write:
Option Map — $0002
DDRC7
Bit 7
0
Figure 6-6. Port C Data Direction Register (DDRC)
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
DDRC6
6
0
DDRC5
5
0
DDRC4
4
0
DDRC3
3
0
DDRC2
2
0
DDRC1
1
0
DDRC0
Bit 0
0
Port D
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