MCMC68HC05L16 Freescale Semiconductor, Inc, MCMC68HC05L16 Datasheet - Page 57

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MCMC68HC05L16

Manufacturer Part Number
MCMC68HC05L16
Description
M68hc05 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
On reset, all port E outputs are disconnected from the pins and the port E data latches are set to logic 1.
If EWOMH bit or EWOML bit in the WOM1 register is set, the P-channel driver of output buffers at the
upper or lower four bits, respectively, are disabled (open-drain mode). These open-drain controls do not
apply to the pins which are configured as frontplane driver outputs.
6.6.1 Port E Data Register
Read
Write
Reset
6.6.2 Port E MUX Register
Read
Write
Reset
PEMx — Port E MUX Control Bit x
Freescale Semiconductor
Anytime; returns output data latch
Anytime (Writes do not change pin state when configured for LCD driver output.)
All bits set to logic 1 and output ports disconnected from the pins (LCD is enabled on reset.)
Anytime when OPTM = 1
Anytime (Writes have no effect if PEH/PEL is set.)
All bits cleared (LCD is enabled.)
0 = Configure pin PEx to LCD
1 = Configure pin PEx to output
Address:
Address:
Reset:
Reset:
Read:
Read:
Write:
Write:
Option Map — $0004
$0004
PEM7
Bit 7
PE7
Bit 7
1
0
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
Figure 6-10. Port E MUX Register (PEMUX)
Figure 6-9. Port E Data Register (PORTE)
PEM6
PE6
6
1
6
0
PEM5
PE5
5
1
5
0
PEM4
PE4
4
1
4
0
PEM3
PE3
3
1
3
0
PEM2
PE2
2
1
2
0
PEM1
PE1
1
1
1
0
PEM0
Bit 0
Bit 0
PE0
1
0
Port E
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