MCMC68HC05L16 Freescale Semiconductor, Inc, MCMC68HC05L16 Datasheet - Page 78

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MCMC68HC05L16

Manufacturer Part Number
MCMC68HC05L16
Description
M68hc05 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Timer System
Because the timer has a 16-bit architecture, each specific functional segment (capability) is represented
by two registers. These registers contain the high byte and low byte of that functional segment. Generally,
accessing the low byte of a specific timer function allows full control of that function; however, an access
of the high byte inhibits that specific timer function until the low byte is accessed also.
78
REGULAR
STATUS
TIMER
$16
$17
The I bit in the condition code register (CCR) should be set while
manipulating both the high byte and low byte register of a specific timer
function to ensure that an interrupt does not occur.
HIGH
BYTE
ICF
INTERRUPT
REGISTER
COMPARE
COMPARE
OUTPUT
OUTPUT
CIRCUIT
CIRCUIT
OCF
LOW
BYTE
TOF
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
Figure 9-2. Timer 1 Block Diagram
$13
PROCESSOR
INTERNAL
CLOCK
÷4
INTERNAL BUS
ICIE
HIGH
BYTE
ALTERNATE
16-BIT FREE
OVERFLOW
REGISTER
COUNTER
COUNTER
RUNNING
OCIE
DETECT
CIRCUIT
NOTE
BUFFER
8-BIT
TOIE
LOW
BYTE
$18
$19
$1A
$1B
IEDG
OLVL
HIGH
BYTE
REGISTER
CAPTURE
CIRCUIT
TIMER
CONTROL
REGULAR
$12
DETECT
INPUT
REGULAR
LOW
BYTE
EDGE
OUTPUT
LEVEL
(NOT CONNECTED TO A PIN)
$14
$15
D
CLK
RESET
C
Q
(TCMP)
Freescale Semiconductor
OUTPUT
LEVEL
(TCAP)
EDGE
INPUT

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