MCMC68HC05L16 Freescale Semiconductor, Inc, MCMC68HC05L16 Datasheet - Page 61

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MCMC68HC05L16

Manufacturer Part Number
MCMC68HC05L16
Description
M68hc05 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
7.4.2 XOSC on Line
If XOSC is the system clock (SYS:SYS1 = 1:1), OSC can be stopped either by the STOP instruction or
by clearing the FOSCE bit.
The suboscillator (XOSC) never stops except during power down. This clock also may be used as the
clock source of the system clock and timebase. STUP bit indicates that the XOSC clock is available.
OSC and XOSC pins have options for feedback and damping resistor implementations. These options
are set through mask option and may be read through the MOSR register.
7.4.2.1 XOSC with FOSCE = 1
If the system clock is XOSC and FOSCE = 1, executing the STOP instruction will halt OSC, put the MCU
into a low-power mode and clear the 6-bit POR counter. The 7-bit divider is not initialized. Exiting STOP
with external IRQ re-starts the oscillator; however, execution begins immediately using XOSC. When the
POR counter overflows, FTUP is set, signaling that OSC is stable and OSC can be used as the system
clock. The stabilization time will vary between 8064 and 8192 counts.
Freescale Semiconductor
OPTION
MASK
When XOSC is not used, the XOSC1 input pin should be connected to the
RESET pin.
Figure 7-2. OSC1, OSC2, XOSC1, and XOSC2 Mask Options
OSC1
RESET LOGIC
RESET
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
R
OSC
f
FROM EXTERNAL RESET CIRCUIT
OSC2
Figure 7-3. Unused XOSC1 Pin
OFF CHIP
ON CHIP
OFF CHIP
NOTE
ON CHIP
XOSC1
XOSC1
XOSC
XOSC
R
f
XOSC2
XOSC2
R
d
NO CONNECT
OPTION
MASK
OSC and XOSC
61

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