MCMC68HC05L16 Freescale Semiconductor, Inc, MCMC68HC05L16 Datasheet - Page 59

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MCMC68HC05L16

Manufacturer Part Number
MCMC68HC05L16
Description
M68hc05 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 7
Oscillators/Clock Distributions
7.1 Introduction
There are two oscillator blocks: OSC and XOSC. Several combinations of the clock distributions are
allowed for the modules in the MC68HC05L16. Refer to
7.2 OSC Clock Divider and POR Counter
The OSC clock is divided by a 7-bit counter which is used for the system clock, timebase, and power-on
reset (POR) counter. Clocks divided by 2, 4, and 64 are available for the system clock selections and a
clock divided by 128 is provided for the timebase and POR counter.
The POR counter is a 6-bit clock counter that is driven by the OSC divided by 128. The overflow of this
counter is used for setting FTUP bit, releasing the POR, and resuming operation from stop mode.
The 7-bit divider and POR counter are initialized to $0078 by two conditions:
Freescale Semiconductor
XOSC1
XOSC2
OSC1
OSC2
PWRON
FOSCE/
Power-on detection
When FOSCE bit is cleared
STOP
XOSC
OSC
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
CTRL
CLK
OSC DIVIDER
Figure 7-1. Clock Signal Distribution
7-BIT
XCLK
1/2
1/2
1/2
1/2
1/2
0
1
5
7
7
SYS1
6-BIT
POR
SEL
Figure
SYS0
7-1.
EXCLK
FTUP
1/2
SYSTEM
CLOCK
TIMEBASE
TIMER 1
TIMER 2
WAIT
SSPI
CPU
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