MCMC68HC05L16 Freescale Semiconductor, Inc, MCMC68HC05L16 Datasheet - Page 72

• Manufacturer Part Number: MCMC68HC05L16
• Description: M68hc05 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Simple Serial Peripheral Interface (SSPI)
8.5.2 Serial Clock (SCK)
SCK is used for synchronization of both input and output data streams through its SDI and SDO pins.
The master and slave devices are capable of exchanging a data byte during a sequence of eight clock
pulses. Since the SCK is generated by the master, slave data transfer is accomplished by synchronization
to SCK.
The master generates the SCK through a circuit driven by the internal processor clock and uses the SCK
to latch incoming slave device data on the SDI pin and shift out data to the slave via the SDO pin. The
SPR bit in the SPCR of the master selects the transmission clock rate.
The slave device receives the SCK from the master device, and uses the SCK to latch incoming master
device data on the SDI pin and shifts out data to the master via the SDO pin. The SPR bit in the SPCR of
the slave has no meaning.
72
DORD = 0
DORD = 0
DORD = 1
DORD = 1
SAMPLE
DATA
SDO
SDO
SCK
SDI
SDI
PC2/SCK should be at V
with an internal or external pullup resistor or by setting DDRC2 = 1 and PC2
= 1 prior to enabling the SSPI. Otherwise, the circuit will not initialize
correctly.
Figure 8-3. SSPI Clock-Data Timing Diagram
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
MSB
MSB
LSB
LSB
BIT6
BIT6
BIT1
BIT1
DD
level before SSPI is enabled. This can be done
BIT5
BIT5
BIT2
BIT2
NOTE
BIT4
BIT4
BIT3
BIT3
BIT3
BIT3
BIT4
BIT4
BIT2
BIT2
BIT5
BIT5
BIT1
BIT1
BIT6
BIT6
MSB
LSB
LSB
MSB
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