SAM9G15 Atmel Corporation, SAM9G15 Datasheet - Page 857
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SAM9G15
Manufacturer Part Number
SAM9G15
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G15.pdf
(1211 pages)
5.SAM9G15.pdf
(45 pages)
Specifications of SAM9G15
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
6
Lin
4
Ssc
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
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- SAM9261 PDF datasheet #3
- SAM9G15 PDF datasheet #4
- SAM9G15 PDF datasheet #5
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39.7.8.18
39.7.9
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
Test Modes
Bus Idle Time-out
The user can choose by the WKUPTYP bit in the LIN Mode register (US_LINMR) either to send
a LIN 2.0 wakeup request (WKUPTYP=0) or to send a LIN 1.3 wakeup request (WKUPTYP=1).
A wake-up request is transmitted by writing the Control Register (US_CR) with the LINWKUP bit
to 1. Once the transfer is completed, the LINTC flag is asserted in the Status Register (US_SR).
It is cleared by writing the Control Register (US_CR) with the RSTSTA bit to 1.
If the LIN bus is inactive for a certain duration, the slave nodes shall automatically enter in sleep
mode. In the LIN 2.0 specification, this time-out is fixed at 4 seconds. In the LIN 1.3 specifica-
tion, it is fixed at 25000 Tbits.
In Slave Node configuration, the Receiver Time-out detects an idle condition on the RXD line.
When a time-out is detected, the bit TIMEOUT in the Channel Status Register (US_CSR) rises
and can generate an interrupt, thus indicating to the driver to go into sleep mode.
The time-out delay period (during which the receiver waits for a new character) is programmed
in the TO field of the Receiver Time-out Register (US_RTOR). If the TO field is programmed to
0, the Receiver Time-out is disabled and no time-out is detected. The TIMEOUT bit in US_CSR
remains to 0. Otherwise, the receiver loads a 17-bit counter with the value programmed in TO.
This counter is decremented at each bit period and reloaded each time a new character is
received. If the counter reaches 0, the TIMEOUT bit in the Status Register rises.
If STTTO is performed, the counter clock is stopped until a first character is received.
If RETTO is performed, the counter starts counting down immediately from the value TO.
Table 39-16. Receiver Time-out programming
The USART can be programmed to operate in three different test modes. The internal loopback
capability allows on-board diagnostics. In the loopback mode the USART interface pins are dis-
connected or not and reconfigured for loopback internally or externally.
LIN Specification
2.0
1.3
19 200 bit/s
20 000 bit/s
Baud Rate
1 000 bit/s
2 400 bit/s
9 600 bit/s
-
Time-out period
25 000 Tbits
4s
SAM9G35
SAM9G35
38 400
76 800
80 000
25 000
4 000
9 600
TO
857
857
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