SAM9G15 Atmel Corporation, SAM9G15 Datasheet - Page 41

• Manufacturer Part Number: SAM9G15
• Manufacturer: Atmel Corporation

Specifications of SAM9G15

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 6
• Lin: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

9.5.1
• CRm[3:0]: Specified Coprocessor Action
Determines specific coprocessor action. Its value is dependent on the CP15 register used. For details, refer to CP15 spe-
cific register behavior.
• opcode_2[7:5]
Determines specific coprocessor operation code. By default, set to 0.
• Rd[15:12]: ARM Register
Defines the ARM register whose value is transferred to the coprocessor. If R15 is chosen, the result is unpredictable.
• CRn[19:16]: Coprocessor Register
Determines the destination coprocessor register.
• L: Instruction Bit
0 = MCR instruction
1 = MRC instruction
• opcode_1[23:20]: Coprocessor Code
Defines the coprocessor specific code. Value is c15 for CP15.
• cond [31:28]: Condition
For more details, see Chapter 2 in ARM926EJ-S TRM.
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
31
23
15
7
CP15 Registers Access
opcode_1
opcode_2
30
22
14
6
CP15 registers can only be accessed in privileged mode by:
Other instructions like CDP, LDC, STC can cause an undefined instruction exception.
The assembler code for these instructions is:
The MCR, MRC instructions bit pattern is shown below:
• MCR (Move to Coprocessor from ARM Register) instruction is used to write an ARM register
• MRC (Move to ARM Register from Coprocessor) instruction is used to read the value of
cond
Rd
to CP15.
CP15 to an ARM register.
MCR/MRC{cond} p15, opcode_1, Rd, CRn, CRm, opcode_2.
29
21
13
5
28
20
12
L
4
1
27
19
11
1
1
3
26
18
10
1
1
2
CRm
CRn
25
17
1
1
9
1
SAM9G35
SAM9G35
24
16
0
1
8
0
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