SAM9G15 Atmel Corporation, SAM9G15 Datasheet - Page 75

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SAM9G15

Manufacturer Part Number
SAM9G15
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G15

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
6
Lin
4
Ssc
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
13. Advanced Interrupt Controller (AIC)
13.1
13.2
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
Description
Embedded Characteristics
The Advanced Interrupt Controller (AIC) is an 8-level priority, individually maskable, vectored
interrupt controller, providing handling of up to thirty-two interrupt sources. It is designed to sub-
stantially reduce the software and real-time overhead in handling internal and external
interrupts.
The AIC drives the nFIQ (fast interrupt request) and the nIRQ (standard interrupt request) inputs
of an ARM processor. Inputs of the AIC are either internal peripheral interrupts or external inter-
rupts coming from the product's pins.
The 8-level Priority Controller allows the user to define the priority for each interrupt source, thus
permitting higher priority interrupts to be serviced even if a lower priority interrupt is being
treated.
Internal interrupt sources can be programmed to be level sensitive or edge triggered. External
interrupt sources can be programmed to be positive-edge or negative-edge triggered or high-
level or low-level sensitive.
The fast forcing feature redirects any internal or external interrupt source to provide a fast inter-
rupt rather than a normal interrupt.
• Controls the Interrupt Lines (nIRQ and nFIQ) of an ARM
• Thirty-two Individually Maskable and Vectored Interrupt Sources
• 8-level Priority Controller
• Vectoring
• Protect Mode
• Fast Forcing
– Source 0 is Reserved for the Fast Interrupt Input (FIQ)
– Source 1 is Reserved for System Peripherals
– Source 2 to Source 31 Control up to Thirty Embedded Peripheral Interrupts or
– Programmable Edge-triggered or Level-sensitive Internal Sources
– Programmable Positive/Negative Edge-triggered or High/Low Level-sensitive
– Drives the Normal Interrupt of the Processor
– Handles Priority of the Interrupt Sources 1 to 31
– Higher Priority Interrupts Can Be Served During Service of Lower Priority Interrupt
– Optimizes Interrupt Service Routine Branch and Execution
– One 32-bit Vector Register per Interrupt Source
– Interrupt Vector Register Reads the Corresponding Current Interrupt Vector
– Easy Debugging by Preventing Automatic Operations when Protect Models Are
– Permits Redirecting any Normal Interrupt Source to the Fast Interrupt of the
External Interrupts
External Sources
Enabled
Processor
®
Processor
SAM9G35
SAM9G35
75
75

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