SAM9G15 Atmel Corporation, SAM9G15 Datasheet - Page 526

• Manufacturer Part Number: SAM9G15
• Manufacturer: Atmel Corporation

Specifications of SAM9G15

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 6
• Lin: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

• SOD
0 (DISABLE): STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.
1 (ENABLE): STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.
• LOCK_IF
0 (DISABLE): Interface Lock capability is disabled
1 (ENABLE): Interface Lock capability is enabled
• LOCK_B
0 (DISABLE): AHB Bus Locking capability is disabled.
1(ENABLE): AHB Bus Locking capability is enabled.
• LOCK_IF_L
0 (CHUNK): The Master Interface Arbiter is locked by the channel x for a chunk transfer.
1 (BUFFER): The Master Interface Arbiter is locked by the channel x for a buffer transfer.
• AHB_PROT
AHB_PROT field provides additional information about a bus access and is primarily used to implement some level of
protection.
• FIFOCFG
526
526
AHB_PROT[2]
Value
HPROT[3]
00
01
10
SAM9G35
SAM9G35
ASAP_CFG
ALAP_CFG
HALF_CFG
Name
AHB_PROT[1]
HPROT[2]
When there is enough space/data available to perform a single AHB access, then the
The largest defined length AHB burst is performed on the destination AHB interface.
When half FIFO size is available/filled, a source/destination request is serviced.
AHB_PROT[0]
HPROT[1]
request is serviced.
Description
HPROT[0]
1
1: Privileged Access
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
0: Not Bufferable
0: Not cacheable
0: User Access
1: Cacheable
1: Bufferable
Data access
Description