SAM9G15 Atmel Corporation, SAM9G15 Datasheet - Page 1102
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
SAM9G15
Manufacturer Part Number
SAM9G15
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G15.pdf
(1211 pages)
5.SAM9G15.pdf
(45 pages)
Specifications of SAM9G15
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
6
Lin
4
Ssc
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G15 PDF datasheet #4
- SAM9G15 PDF datasheet #5
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- Download datasheet (30Mb)
45.7.4
Name:
Address:
Access:
Reset:
• HFPW: Horizontal Front Porch Width
Number of pixel clock cycles inserted at the end of the active line. The interval is equal to (HFPW+1) LCD_PCLK cycles.
• HBPW: Horizontal Back Porch Width
Number of pixel clock cycles inserted at the beginning of the line. The interval is equal to (HBPW+1) LCD_PCLK cycles.
1102
1102
31
23
15
–
–
7
SAM9G35
SAM9G35
LCD Controller Configuration Register 3
LCDC_LCDCFG3
0xF803800C
Read-write
0x00000000
30
22
14
–
–
6
29
21
13
–
–
5
28
20
12
–
–
4
HBPW
HFPW
27
19
11
–
–
3
26
18
10
–
–
2
25
17
–
9
–
1
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
24
16
–
8
–
0
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