SAM9G15 Atmel Corporation, SAM9G15 Datasheet - Page 233
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SAM9G15
Manufacturer Part Number
SAM9G15
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G15.pdf
(1211 pages)
5.SAM9G15.pdf
(45 pages)
Specifications of SAM9G15
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
6
Lin
4
Ssc
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G15 PDF datasheet #4
- SAM9G15 PDF datasheet #5
- Current page: 233 of 1274
- Download datasheet (30Mb)
23.5.15
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
Write Protection Registers
To prevent any single software error that may corrupt PIO behavior, certain address spaces can
be write-protected by setting the WPEN bit in the
(PIO_WPMR).
If a write access to the protected registers is detected, then the WPVS flag in the PIO Write Pro-
tect Status Register (PIO_WPSR) is set and the field WPVSRC indicates in which register the
write access has been attempted.
The WPVS flag is reset by writing the PIO Write Protect Mode Register (PIO_WPMR) with the
appropriate access key, WPKEY.
The protected registers are:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
“PIO Enable Register” on page 238
“PIO Disable Register” on page 238
“PIO Output Enable Register” on page 239
“PIO Output Disable Register” on page 240
“PIO Input Filter Enable Register” on page 241
“PIO Input Filter Disable Register” on page 241
“PIO Multi-driver Enable Register” on page 246
“PIO Multi-driver Disable Register” on page 247
“PIO Pull Up Disable Register” on page 248
“PIO Pull Up Enable Register” on page 248
“PIO Peripheral ABCD Select Register 1” on page 250
“PIO Peripheral ABCD Select Register 2” on page 251
“PIO Output Write Enable Register” on page 256
“PIO Output Write Disable Register” on page 256
“PIO Pad Pull Down Disable Register” on page 254
“PIO Pad Pull Down Status Register” on page 255
“PIO Write Protect Mode Register”
SAM9G35
SAM9G35
233
233
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