SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 69

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SAM7L128

Manufacturer Part Number
SAM7L128
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7L128

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
36 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
80
Ext Interrupts
80
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
3
Segment Lcd
40
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
460
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
6
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.8 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
14. Real-time Clock (RTC)
14.1
14.2
Figure 14-1. RTC Block Diagram
14.3
14.3.1
14.3.2
6257A–ATARM–20-Feb-08
Overview
Block Diagram
Product Dependencies
Crystal Oscillator: SLCK
Power Management
Interrupt
Bus Interface
The Real-time Clock (RTC) peripheral is designed for very low power consumption.
It combines a complete time-of-day clock with alarm and a two-hundred-year Gregorian calen-
dar, complemented by a programmable periodic interrupt. The alarm and calendar registers are
accessed by a 32-bit data bus.
The time and calendar values are coded in binary-coded decimal (BCD) format. The time format
can be 24-hour mode or 12-hour mode with an AM/PM indicator.
Updating time and calendar fields and configuring the alarm fields are performed by a parallel
capture on the 32-bit data bus. An entry control is performed to avoid loading registers with
incompatible BCD format data or with an incompatible date according to the current
month/year/century.
The Real-time Clock is continuously clocked at 32768 Hz. The Power Management Controller
has no effect on RTC behavior.
The RTC Interrupt is connected to interrupt source 1 (IRQ1) of the advanced interrupt controller.
This interrupt line is due to the OR-wiring of the system peripheral interrupt lines (System Timer,
Real Time Clock, Power Management Controller, Memory Controller, etc.). When a system
interrupt occurs, the service routine must first determine the cause of the interrupt. This is done
by reading the status registers of the above system peripherals successively.
32768 Divider
Bus Interface
Control
AT91SAM7L128/64 Preliminary
Entry
Time
Interrupt
Control
Date
RTC Interrupt
69

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