SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 55
SAM7L128
Manufacturer Part Number
SAM7L128
Description
Manufacturer
Atmel Corporation
Specifications of SAM7L128
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
36 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
80
Ext Interrupts
80
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
3
Segment Lcd
40
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
460
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
6
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.8 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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12.5.4.1
6257A–ATARM–20-Feb-08
JTAG Boundary-scan Register
IEEE 1149.1 JTAG Boundary Scan is enabled when TST, JTAGSEL are high and CLKIN,
FWUP and RNRSTB are tied low. VDDCORE must be externally supplied between 1.8V and
1.95V. The SAMPLE, EXTEST and BYPASS functions are implemented. In ICE debug mode,
the ARM processor responds with a non-JTAG chip ID that identifies the processor to the ICE
system. This is not IEEE 1149.1 JTAG-compliant.
It is not possible to switch directly between JTAG and ICE operations. A chip reset must be per-
formed after JTAGSEL is changed.
A Boundary-scan Descriptor Language (BSDL) file is provided to set up test.
The Boundary-scan Register (BSR) contains 160 bits that correspond to active pins and associ-
ated control signals.
Each AT91SAM7Lxx input/output pin corresponds to a 3-bit register in the BSR. The OUTPUT
bit contains data that can be forced on the pad. The INPUT bit facilitates the observability of data
applied to the pad. The CONTROL bit selects the direction of the pad.
For more information, please refer to BDSL files which are available for the SAM7L Series.
AT91SAM7L128/64 Preliminary
55
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