SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 499
SAM7L128
Manufacturer Part Number
SAM7L128
Description
Manufacturer
Atmel Corporation
Specifications of SAM7L128
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
36 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
80
Ext Interrupts
80
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
3
Segment Lcd
40
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
460
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
6
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.8 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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34.5.2.5
Figure 34-7.
34.5.2.6
6257A–ATARM–20-Feb-08
-
-
2
1
2
1
2
1
1
2
/
/
/
/
/
/
/
/
3
3
3
3
3
3
3
3
-V
V
V
V
V
V
V
V
V
V
V
V
GND
GND
GND
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
Low Power Waveform
Frame Rate
Default and Low Power Waveform
Frame
To reduce toggle activity and hence power consumption, a low power waveform can be selected
by writing LPMODE to one. The default and low power waveform is shown in
duty and 1/3 bias. For other selections of duty and bias, the effect is similar.
Note:
The Frame Rate register (SLCDC_FRR) enables the generation of the frequency used by the
SLCD Controller. It is done by a prescaler (division by 8, 16, 32, 64, 128, 256, 512 and 1024) fol-
lowed by a finer divider (division by 1, 2, 3, 4, 5, 6, 7 or 8).
To calculate the proper frame frequency needed, the equation below must be taken into
account:
Where:
f
f
PRES = prescaler value (8, 16, 32, 64, 128, 256, 512 or 1024)
DIV = divider value (1, 2, 3, 4, 5, 6, 7, or 8)
NCOM = depends of number of commons and is defined in
SCLK
frame
= frame frequency
= slow clock frequency
Frame
Refer to the LCD specification to verify that low power waveforms are supported.
SEG0
COM0
SEG0 - COM0
f
frame
AT91SAM7L128/64 Preliminary
-
-
2
1
2
1
2
1
1
2
/
/
/
/
/
/
/
/
3
3
3
3
3
3
3
3
-V
=
V
V
V
V
V
V
V
V
V
V
V
GND
GND
GND
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
--------------------------------------------------------- -
(
PRES DIV NCOM
⋅
Frame
fSCLK
⋅
Table 34-3
Frame
)
below:
SEG0
COM0
SEG0 - COM0
Figure 34-7
for 1/3
499
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