SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 114

• Manufacturer Part Number: SAM7L128
• Manufacturer: Atmel Corporation

Specifications of SAM7L128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 36 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 80
• Ext Interrupts: 80
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Segment Lcd: 40
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 460
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 6
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.8 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

17.3.6.6
114
AT91SAM7L128/64 Preliminary
Controlling the Flash Memory Power Supply
The status of the LCD Controller Reset can be seen through the LCDS field in the status regis-
ter, SUPC_ SR.
There are several restrictions concerning the write of the LCDMODE field:
The Supply Controller can be used to switch on or off the power supply of the Flash Memory by
opening or closing the Flash Memory power switch (connected to VDDCORE). This power
switch is controlled by the FLASHON bit of the Supply Controller Mode Register (SUPC_MR).
Before setting FLASHON to 1 or 0, the user needs to program SUPC_FWUT correctly. Based on
this counter the Supply Controller will correctly manage the control of the Flash Memory (refer to
the wake-up time of the Flash Memory in the Electrical Characteristics section of the product
datasheet).
• If LCDMODE is written to 0x2 while it is at 0x0 or 0x1, after the write resynchronization time
• If LCDMODE is written to 0x0 while it is at 0x2, after the write resynchronization time (about 2
• If LCDMODE is written to 0x1 while it is at 0x2, after the write resynchronization time (about 2
• If LCDMODE is written to 0x3 while it is at 0x0 or 0x1, after the write resynchronization time
• If LCDMODE is written to 0x0 while it is at 0x3, after the write resynchronization time (about 2
• If LCDMODE is written to 0x1 while it is at 0x3, after the write resynchronization time (about 2
• The user must check that the previous power supply selection is done before writing
• Writing LCDMODE to 0x2 while it is at 0x3 or writing LCDMODE to 0x3 while it is at 0x2 is
• Before writing LCDMODE to 0x2, the user must ensure that the external power supply is
• Before writing LCDMODE to 0x3, the user must ensure that the external power supply
(about 2 slow clock cycles), the external power supply source is selected by setting the
output signal, lcd_ext_on at 1, then after one slow clock cycle, the reset signal, lcd_nreset is
released.
slow clock cycles), the reset signal, lcd_nreset is asserted, then after one slow clock cycle,
the external power supply source is deselected by resetting the output signal, lcd_ext_on at
0.
slow clock cycles), the Supply Controller waits for the End of Frame, then the reset signal,
lcd_nreset is asserted, then after one slow clock cycle, the external power supply source is
deselected by resetting the output signal, lcd_ext_on at 0.
(about 2 slow clock cycles), the internal power supply source is selected and the embedded
charge pump turned on by setting the output signal, lcd_int_on at 1, then after 15 slow clock
cycles, the reset signal, lcd_nreset is released.
slow clock cycles), the reset signal, lcd_nreset is asserted, then after one slow clock cycle,
the internal power supply source is deselected and the embedded charge pump turned off by
resetting the output signal, lcd_int_on at 0.
slow clock cycles), the Supply Controller waits for the End of Frame, then the reset signal,
lcd_nreset is asserted, then after one slow clock cycle, the internal power supply source is
deselected and the embedded charge pump turned off by resetting the output signal,
lcd_int_on at 0.
LCDMODE again. To do that, the user must check that the LCDS flag has the correct value. If
LCDMODE is written to 0x0 or 0x1, the LCDS flag is reset at 0. If LCDMODE is written to 0x0
or 0x1, the LCDS flag is set at 1.
forbidden and has no effect.
ready and supplies the VDDLCD pad.
doesn’t supply the VDDLCD pad.
6257A–ATARM–20-Feb-08