SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 115

• Manufacturer Part Number: SAM7L128
• Manufacturer: Atmel Corporation

Specifications of SAM7L128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 36 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 80
• Ext Interrupts: 80
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Segment Lcd: 40
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 460
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 6
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.8 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

17.3.7
6257A–ATARM–20-Feb-08
Wake Up Sources
The Flash Memory is automatically switched on when the core power supply is enabled at start
up.
The status of the Flash Memory, i.e., ready to use, or not ready, can be seen through the
FLASHS field in the status register SUPC_ SR.
There are several restrictions concerning the write of the FLASHON field:
The wake up events allow the device to exit backup mode. When a wake up event is detected,
the Supply Controller performs a sequence which automatically reenables the core power sup-
ply, and the SRAM power supply, if it is not already enabled.
• If FLASHON is written to 1 while it is at 0, after one main clock cycle, the Flash Memory
• If FLASHON is written to 0 while it is at 1, after one main clock cycle, the flag FLASHS is
• The user must check that the previous power supply switch operation is done before writing
• Writing FLASHON at 1 while it is already at 1 or writing FLASHON at 0 while it is already at 0
power switch is closed by resetting the flash_off signal at 0, then after ninety main clock
cycles the FLASHS flag signal is set at 1. This ensures that the Flash Memory is always
properly cleared when its power rises.
reset to 0, then two main clock cycles after, the Flash Memory power switch is opened by
setting the signal, flash_off at 1.
FLASHON again. To do that, the user must check that the FLASHS flag has the correct
value. If FLASHON is written to 0, the FLASHS flag is reset at 0. If FLASHON is written to 1,
the FLASHS flag is set at 1.
is forbidden and has no effect.
AT91SAM7L128/64 Preliminary
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