SAM3S16C Atmel Corporation, SAM3S16C Datasheet - Page 48
SAM3S16C
Manufacturer Part Number
SAM3S16C
Description
Manufacturer
Atmel Corporation
Datasheet
1.SAM3S16C.pdf
(1130 pages)
Specifications of SAM3S16C
Flash (kbytes)
1024 Kbytes
Pin Count
100
Max. Operating Frequency
100 MHz
Cpu
Cortex-M3
# Of Touch Channels
39
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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12.3.3.1
12.3.3.2
12.3.3.3
12.3.3.4
6
SAM3S16
General-purpose registers
Stack Pointer
Link Register
Program Counter
Table 12-2.
1.
2.
R0-R12 are 32-bit general-purpose registers for data operations.
The Stack Pointer (SP) is register R13. In Thread mode, bit[1] of the CONTROL register indi-
cates the stack pointer to use:
On reset, the processor loads the MSP with the value from address 0x00000000.
The Link Register (LR) is register R14. It stores the return information for subroutines, function
calls, and exceptions. On reset, the processor loads the LR value 0xFFFFFFFF
The Program Counter (PC) is register R15. It contains the current program address. Bit[0] is
always 0 because instruction fetches must be halfword aligned. On reset, the processor loads
the PC with the value of the reset vector, which is at address 0x00000004.
Name
FAULTMASK
BASEPRI
CONTROL
• 0 = Main Stack Pointer (MSP). This is the reset value.
• 1 = Process Stack Pointer (PSP).
Describes access type during program execution in thread mode and Handler mode. Debug
An entry of Either means privileged and unprivileged software can access the register.
access can differ.
Core register set summary (Continued)
Type
RW
RW
RW
(1)
Privileged
Privileged
Privileged
Required
privilege
(2)
Reset
value
0x00000000
0x00000000
0x00000000
Description
“Fault Mask Register” on page 11
“Base Priority Mask Register” on page 12
“CONTROL register” on page 13
11117B–ATARM–18-Oct-11
.
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