SAM3S16C Atmel Corporation, SAM3S16C Datasheet - Page 317
SAM3S16C
Manufacturer Part Number
SAM3S16C
Description
Manufacturer
Atmel Corporation
Datasheet
1.SAM3S16C.pdf
(1130 pages)
Specifications of SAM3S16C
Flash (kbytes)
1024 Kbytes
Pin Count
100
Max. Operating Frequency
100 MHz
Cpu
Cortex-M3
# Of Touch Channels
39
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Table 21-5.
21.3.5
11117B–ATARM–18-Oct-11
11117B–ATARM–18-Oct-11
Step
1
2
3
4
5
6
7
8
9
10
11
12
13
Device Operations
Programmer Action
Sets MODE and DATA signals
Clears NCMD signal
Waits for RDY low
Sets DATA signal in tristate
Clears NOE signal
Waits for NVALID low
Reads value on DATA Bus
Sets NOE signal
Waits for NVALID high
Sets DATA in output mode
Sets NCMD signal
Waits for RDY high
Read Handshake
Figure 21-3.
Several commands on the Flash memory are available. These commands are summarized in
Table 21-3 on page
face running several read/write handshaking sequences.
When a new command is executed, the previous one is automatically achieved. Thus, chaining
a read command after a write automatically flushes the load buffer in the Flash.
MODE[3:0]
DATA[15:0]
NVALID
NCMD
Parallel Programming Timing, Read Sequence
NOE
RDY
273. Each command is driven by the programmer through the parallel inter-
1
Device Action
Waits for NCMD low
Latch MODE and DATA
Clears RDY signal
Waits for NOE Low
Sets DATA bus in output mode and outputs
the flash contents.
Clears NVALID signal
Waits for NOE high
Sets DATA bus in input mode
Sets NVALID signal
Waits for NCMD high
Sets RDY signal
2
Adress IN
ADDR
3
4
5
Z
6
7
Data OUT
8
9
Input
DATA I/O
Input
Input
Input
Input
Tristate
Output
Output
Output
Output
X
Input
Input
10
11
X
12
SAM3S16
SAM3S16
13
IN
275
275
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