SAM3S16C Atmel Corporation, SAM3S16C Datasheet - Page 296
SAM3S16C
Manufacturer Part Number
SAM3S16C
Description
Manufacturer
Atmel Corporation
Datasheet
1.SAM3S16C.pdf
(1130 pages)
Specifications of SAM3S16C
Flash (kbytes)
1024 Kbytes
Pin Count
100
Max. Operating Frequency
100 MHz
Cpu
Cortex-M3
# Of Touch Channels
39
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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20.4
20.4.1
Figure 20-1. Embedded Flash Organization
254
254
Functional Description
SAM3S16
SAM3S16
Embedded Flash Organization
Start Address + Flash size -1
The embedded Flash interfaces directly with the 32-bit internal bus. The embedded Flash is
composed of:
The embedded Flash size, the page size, the lock regions organization and GPNVM bits defini-
tion are described in the product definition section. The Enhanced Embedded Flash Controller
(EEFC) returns a descriptor of the Flash controlled after a get descriptor command issued by the
application (see
• One memory plane organized in several pages of the same size.
• Two 128-bit or 64-bit read buffers used for code read optimization.
• One 128-bit or 64-bit read buffer used for data read optimization.
• One write buffer that manages page programming. The write buffer size is equal to the page
• Several lock bits used to protect write/erase operation on several pages (lock region). A lock
• Several bits that may be set and cleared through the Enhanced Embedded Flash Controller
size. This buffer is write-only and accessible all along the 1 MByte address space, so that
each word can be written to its final address.
bit is associated with a lock region composed of several pages in the memory plane.
(EEFC) interface, called General Purpose Non Volatile Memory bits (GPNVM bits).
Start Address
“Getting Embedded Flash Descriptor” on page
Memory Plane
Page (n*m-1)
Page (m-1)
Page 0
Lock Region 0
Lock Region 1
Lock Region (n-1)
258).
Lock Bit 0
Lock Bit 1
Lock Bit (n-1)
11117B–ATARM–18-Oct-11
11117B–ATARM–18-Oct-11
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