ATUC128L4U Atmel Corporation, ATUC128L4U Datasheet - Page 213

• Manufacturer Part Number: ATUC128L4U
• Manufacturer: Atmel Corporation

Specifications of ATUC128L4U

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.6.3.1
13.6.3.2
Table 13-2.
Notes:
32142A–12/2011
Index
0
1
2
3
4
5
6
(1)
1. The sleep mode index is used as argument for the sleep instruction.
2. OSC32K will only remain operational if pre-enabled.
3. Clock sources other than those specifically listed in the table.
4. SYSTIMER is the clock for the CPU COUNT and COMPARE registers.
Sleep Mode
Idle
Frozen
Standby
Stop
DeepStop
Static
Shutdown
Entering and exiting sleep modes
Supported sleep modes
Sleep Modes
CPU
Stop
Stop
Stop
Stop
Stop
Stop
Stop
The sleep instruction will halt the CPU and all modules belonging to the stopped clock domains.
The modules will be halted regardless of the bit settings in the mask registers.
Clock sources can also be switched off to save power. Some of these have a relatively long
start-up time, and are only switched off when very low power consumption is required.
The CPU and affected modules are restarted when the sleep mode is exited. This occurs when
an interrupt triggers. Note that even if an interrupt is enabled in sleep mode, it may not trigger if
the source module is not clocked.
The following sleep modes are supported. These are detailed in
The internal voltage regulator is also adjusted according to the sleep mode in order to reduce its
power consumption.
• Idle: The CPU is stopped, the rest of the device is operational.
• Frozen: The CPU and HSB modules are stopped, peripherals are operational.
• Standby: All synchronous clocks are stopped, and the clock sources are running, allowing for
• Stop: As Standby, but oscillators, and other clock sources are also stopped. 32KHz Oscillator
• DeepStop: All synchronous clocks and clock sources are stopped. Bandgap voltage
• Static: All clock sources, including RCSYS are stopped. Bandgap voltage reference and BOD
• Shutdown: All clock sources, including RCSYS are stopped. Bandgap voltage reference,
a quick wake-up to normal mode.
OSC32K
reference and BOD are turned off. OSC32K
are turned off. OSC32K
BOD detector, and Voltage regulator are turned off. OSC32K
mode can only be used in the “ 3.3V supply mode, with 1.8V regulated I/O lines “
configuration (described in Power Considerations chapter). Refer to
details.
HSB
Run
Stop
Stop
Stop
Stop
Stop
Stop
(2)
PBx,
GCLK
Run
Run
Stop
Stop
Stop
Stop
Stop
, RCSYS, AST, and WDT will remain operational.
Clock Sources
SYSTIMER
Run
Run
Run
Stop
Stop
Stop
Stop
(2)
remains operational.
(4)
(3)
,
OSC32K
Run
Run
Run
Run
Run
Run
Run
(2)
(2)
and RCSYS remain operational.
ATUC64/128/256L3/4U
RCSYS
Run
Run
Run
Run
Run
Stop
Stop
(2)
Table 13-2 on page
On
On
On
BOD &
Bandgap
On
Off
Off
Off
remains operational. This
Section 13.6.4
Normal mode
Normal mode
Voltage
Regulator
Normal mode
Low power mode
Low power mode
Low power mode
Off
213.
for more
213