ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 77

• Manufacturer Part Number: ATmega8HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega8HVA

• Flash (kbytes): 8 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

17. Timer/Counter(T/C0,T/C1)
17.1
17.2
8024A–AVR–04/08
Features
Overview
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Timer/Counter n is a general purpose 8-/16-bit Timer/Counter module, with one/two Output
Compare units and Input Capture functionality.
ATmega8HVA/16HVA has two Timer/Counters, Timer/Counter0 and Timer/Counter1. The func-
tionality for both Timer/Counters is described below. Timer/Counter0 and Timer/Counter1 have
different Timer/Counter registers, as shown in
The Timer/Counter general operation is described in 8-/16-bit mode. A simplified block diagram
of the 8-/16-bit Timer/Counter is shown in
I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are
listed in the
Figure 17-1. 8-/16-bit Timer/Counter Block Diagram
Clear Timer on Compare Match (Auto Reload)
Input Capture unit
Four Independent Interrupt Sources (TOVn, OCFnA, OCFnB, ICFn)
8-bit Mode with Two Independent Output Compare Units
16-bit Mode with One Independent Output Compare Unit
”Register Description” on page
TCCRnA
TCNTnH
OCRnB
=
Timer/Counter
Direction
Count
Clear
TCNTnL
TCCRnB
OCRnA
=
Control Logic
Figure
90.
”Register Summary” on page
TOP
17-1. CPU accessible I/O Registers, including
Detector
Edge
clk
ATmega8HVA/16HVA
=
Tn
Canceler
Fixed TOP value
( From Prescaler )
Noise
Clock Select
Detector
Edge
TOVn (Int. Req.)
175.
OCnA (Int. Req.)
OCnB (Int. Req.)
ICFn (Int. Req.)
ICPn1
ICPn0
Tn
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