ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 130

• Manufacturer Part Number: ATmega8HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega8HVA

• Flash (kbytes): 8 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

23.9.5
130
ATmega8HVA/16HVA
BPHCTR – Battery Protection High-current Timing Register
Note:
• Bit 7:6 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bit 5:0 – HCPT5:0: High-current Protection Timing
These bits control the delay of the High-circuit Protection. The High-current Timing can be set
with a step size of 2 ms as shown in
Table 23-4.
Notes:
Note:
Bit
(0xFC)
Read/Write
Initial Value
Due to synchronization of parameters between clock domains, a guard time of 3 ULP oscillator
cycles + 3 CPU clock cycles is required between each time the BPOCTR register is written. Any
writing to the BPOCTR register during this period will be ignored.
1. The actual value depends on the actual frequency of the
2. Initial value.
3. An additional delay T
Due to synchronization of parameters between clock domains, a guard time of 3 ULP oscillator
cycles + 3 CPU clock cycles is required between each time the BPHCTR register is written. Any
writing to the BPHCTR register during this period will be ignored.
applies when enabling the Discharge FET. For Charge Over-Current protection, this applies
when enabling the Charge FET. With nominal ULP frequency this delay is maximum 0.1 ms.
page
the initialization of the protection circuitry. For the Discharge High-Current protection, this
applies when enabling the Discharge FET. For Charge High-Current protection, this applies
when enabling the Charge FET. With nominal ULP frequency this delay is maximum 0.2 ms.
High-current Protection Reaction Time. HCPT[5:0] with corresponding High-cur-
rent Delay Time.
26. See
R
7
–
0
HCPT[5:0]
0x01
0x3E
0x00
0x02
0x03
0x3F
...
”Electrical Characteristics” on page
(2)
R
6
–
0
High-current Protection Reaction Time
d
can be expected after enabling the corresponding FET. This is related to
R/W
5
0
Table 23-4 on page
R/W
4
0
R/W
3
0
HCPT[5:0]
165.
130.
R/W
(122 - 124 ms) + T
(124 - 126 ms) + T
2
0
”Ultra Low Power RC Oscillator” on
(0 - 2 ms) + T
(0 - 2 ms) + T
(2 - 4 ms) + T
(4 - 6 ms) + T
(1)
R/W
Typ
...
1
0
d
d
d
d
(3)
(3)
(3)
(3)
d
d
R/W
(3)
(3)
0
1
8024A–AVR–04/08
BPHCTR