ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 109

• Manufacturer Part Number: ATmega8HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega8HVA

• Flash (kbytes): 8 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

19.7.2
8024A–AVR–04/08
CADCSRB - CC-ADC Control and Status Register B
• Bits 7 - Res: Reserved
This bit is reserved bit and will always read as zero.
• Bit 6 - CADACIE: CC-ADC Accumulate Current Interrupt Enable
When the CADACIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC
Accumulate Current Interrupt is enabled.
• Bit 5 - CADRCIE: CC-ADC Regular Current Interrupt Enable
When the CADRCIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC
Regular Current Interrupt is enabled.
• Bit 4 - CADICIE: CC-ADC Instantaneous Current Interrupt Enable
When the CADICIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC
Instantaneous Current Interrupt is enabled.
• Bits 3 - Res: Reserved
This bit is reserved bit and will always read as zero.
• Bit 2 - CADACIF: CC-ADC Accumulate Current Interrupt Flag
The CADACIF bit is set (one) after the Accumulate Current conversion has completed. The
CCADC Accumulate Current Interrupt is executed if the CADACIE bit and the I-bit in SREG are
set (one). CADACIF is cleared by hardware when executing the corresponding Interrupt Han-
dling Vector. Alternatively, CADACIF is cleared by writing a logic one to the flag.
• Bit 1 - CADRCIF: CC-ADC Regular Current Interrupt Flag
The CADRCIF bit is set (one) when the absolute value of the result of the last CC-ADC conver-
sion is greater than, or equal to, the compare values set by the CC-ADC Regular Current Level
Register.
• Bit 0 - CADICIF: CC-ADC Instantaneous Current Interrupt Flag
The CADICIF bit is set (one) when a CC-ADC Instantaneous Current conversion is completed.
The CC-ADC Instantaneous Current Interrupt is executed if the CADICIE bit and the I-bit in
SREG are set (one). CADICIF is cleared by hardware when executing the corresponding Inter-
rupt Handling vector. Alternatively, CADICIF is cleared by writing a logic one to the flag.
Bit
(0xE5)
Read/Write
Initial Value
R
7
0
–
CADACIE
R/W
6
0
CADRCIE
R
5
0
CADICIE
R/W
4
0
R
3
0
–
ATmega8HVA/16HVA
CADACIF
R/W
2
0
CADRCIF
R/W
1
0
CADICIF
R/W
0
0
CADCSRB
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