ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 24

• Manufacturer Part Number: ATmega8HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega8HVA

• Flash (kbytes): 8 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

9. System Clock and Clock Options
9.1
9.1.1
9.1.2
9.1.3
9.1.4
24
Clock Systems and their Distribution
ATmega8HVA/16HVA
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
Voltage ADC Clock – clk
I/O
Figure 9-1
need not be active at a given time. In order to reduce power consumption, the clocks to modules
not being used can be halted by using different sleep modes, as described in
ment and Sleep Modes” on page
Figure 9-1.
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules. The I/O clock is also used by the Exter-
nal Interrupt module, but note that some external interrupts are detected by asynchronous logic,
allowing such interrupts to be detected even if the I/O clock is halted.
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simul-
taneously with the CPU clock.
The Voltage ADC is provided with a dedicated clock domain. The VADC clock is automatically
prescaled relative to the System Clock Prescalers setting by the VADC Prescaler, giving a fixed
VADC clock at 1 MHz.
CPU
FLASH
Coulomb Counter
ADC
1/4
VADC
clk
Oscillator
presents the principal clock systems in the AVR and their distribution. All of the clocks
Slow RC
CCADC
Oscillator Sampling
Clock Distribution
Interface
Watchdog Timer
CORE
34. The clock systems are detailed below.
CPU
Battery Protection
Ultra Low Power
RC Oscillator
clk
CPU
RAM
Reset Logic
FLASH and
EEPROM
clk
FLASH
Clock Control
System Clock
Oscillator
Prescaler
Fast RC
Prescaler
AVR
VADC
clk
Voltage
VADC
ADC
”Power Manage-
8024A–AVR–04/08
clk
Other I/O
Modules
I/O