ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 76

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ATmega8HVA

Manufacturer Part Number
ATmega8HVA
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega8HVA

Flash (kbytes)
8 Kbytes
Pin Count
28
Max. Operating Frequency
4 MHz
Cpu
8-bit AVR
# Of Touch Channels
3
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
12
Adc Speed (ksps)
1.9
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
256
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-20 to 85
I/o Supply Class
1.8 to 9.0
Operating Voltage (vcc)
1.8 to 9.0
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes
16.3
16.3.1
16.3.2
76
Register Description
ATmega8HVA/16HVA
TCCRnB – Timer/Counter n Control Register B
General Timer/Counter Control Register – GTCCR
• Bits 2, 1, 0 – CSn2, CSn1, CSn0: Clock Select n, Bit 2, 1, and 0
The Clock Select n bits 2, 1, and 0 define the prescaling source of Timer n.
Table 16-1.
If external pin modes are used for the Timer/Counter n, transitions on the Tn pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
• Bit 7 – TSM: Timer/Counter Synchronization Mode
Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the
value that is written to the PSRSYNC bit is kept, hence keeping the corresponding prescaler
reset signals asserted. This ensures that the corresponding Timer/Counters are halted and can
be configured to the same value without the risk of one of them advancing during configuration.
When the TSM bit is written to zero the PSRSYNC bit is cleared by hardware, and the
Timer/Counters start counting simultaneously.
• Bit 0 – PSRSYNC: Prescaler Reset
When this bit is one, Timer/Counter1 and Timer/Counter0 prescaler will be reset. This bit is nor-
mally cleared immediately by hardware, except if the TSM bit is set. Note that Timer/Counter1
and Timer/Counter0 share the same prescaler and a reset of this prescaler will affect both
timers.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CSn2
0
0
0
0
1
1
1
1
CSn1
0
0
1
1
0
0
1
1
Clock Select Bit Description
TSM
R/W
7
0
R
7
0
-
CSn0
R
0
1
0
1
0
1
0
1
6
0
-
R
6
0
Description
No clock source (Timer/Counter stopped)
clk
clk
clk
clk
clk
External clock source on Tn pin. Clock on falling edge.
External clock source on Tn pin. Clock on rising edge.
R
5
0
-
I/O
I/O
I/O
I/O
I/O
R
5
0
(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R
4
0
-
R
4
0
R
3
0
-
R
3
0
CSn2
R/W
2
0
R
2
0
CSn1
R/W
R
1
0
1
0
PSRSYNC
CSn0
R/W
R/W
0
0
0
0
8024A–AVR–04/08
TCCRnB
GTCCR

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