ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 19

• Manufacturer Part Number: ATmega8HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega8HVA

• Flash (kbytes): 8 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

8.5.1
8.6
8.6.1
8.6.2
8.6.3
8024A–AVR–04/08
Register Description
General Purpose I/O Registers
EEAR – The EEPROM Address Register
EEDR – The EEPROM Data Register
EECR – The EEPROM Control Register
I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using
LD and ST instructions, 0x20 must be added to these addresses. The ATmega8HVA/16HVA is a
complex microcontroller with more peripheral units than can be supported within the 64 location
reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 -
0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI
instructions will only operate on the specified bit, and can therefore be used on registers contain-
ing such status flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
The ATmega8HVA/16HVA contains three General Purpose I/O Registers. These registers can
be used for storing any information, and they are particularly useful for storing global variables
and Status Flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are
directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
• Bits 7:0 – EEAR7:0: EEPROM Address
The EEPROM Address Registers – EEAR specify the EEPROM address in the 256 bytes
EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 255. The ini-
tial value of EEAR is undefined. A proper value must be written before the EEPROM may be
accessed.
• Bits 7:0 – EEDR7:0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
Bit
0x21 (0x41)
Read/Write
Initial Value
Bit
0x20 (0x40)
Read/Write
Initial Value
Bit
0x1F (0x3F)
Read/Write
Initial Value
EEAR7
MSB
R/W
R/W
R
7
X
7
–
0
7
0
EEAR6
R/W
R/W
R
6
X
6
–
0
6
0
EEPM1
EEAR5
R/W
R/W
R/W
X
5
X
5
5
0
EEPM0
EEAR4
R/W
R/W
R/W
X
X
4
4
4
0
EEAR3
EERIE
R/W
R/W
R/W
3
0
3
X
3
0
ATmega8HVA/16HVA
EEMPE
EEAR2
R/W
R/W
R/W
X
2
2
0
2
0
EEAR1
EEPE
R/W
R/W
R/W
X
1
1
0
1
X
EEAR0
EERE
R/W
LSB
R/W
R/W
X
0
0
0
0
0
EEAR
EEDR
EECR
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