ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 115

• Manufacturer Part Number: ATmega8HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega8HVA

• Flash (kbytes): 8 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

20.4.3
8024A–AVR–04/08
VADCL and VADCH – V-ADC Data Register
VADSC will read as one as long as the conversion is not finished. When the conversion is com-
plete, it returns to zero. Writing zero to this bit has no effect. VADSC will automatically be
cleared when the VADEN bit is written to zero.
• Bit 1 – VADCCIF: V-ADC Conversion Complete Interrupt Flag
This bit is set when a V-ADC conversion completes and the data registers are updated. The V-
ADC Conversion Complete Interrupt is executed if the VADCCIE bit and the I-bit in SREG are
set. VADCCIF is cleared by hardware when executing the corresponding interrupt handling vec-
tor. Alternatively, VADCCIF is cleared by writing a logical one to the flag. Beware that if doing a
Read-Modify-Write on VADCSR, a pending interrupt can be lost.
• Bit 0 – VADCCIE: V-ADC Conversion Complete Interrupt Enable
When this bit is written to one and the I-bit in SREG is set, the V-ADC Conversion Complete
Interrupt is activated.
When a V-ADC conversion is complete, the result is found in these two registers. To ensure that
correct data is read, both high and low byte data registers should be read before starting a new
conversion.
• VADC11:0: V-ADC Conversion Result
These bits represent the result from the conversion.
To obtain the best absolute accuracy for the cell voltage measurements, gain and offset com-
pensation is required. Factory calibration values are stored in the device signature row, refer to
section "Reading the Signature Row from Software" on page 144 for details. The cell voltage in
mV is given by:
The voltage on the ADCn is given by:
When performing a VTEMP conversion, the result must be adjusted by the factory calibration
value stored in the signature row, refer to section
on page 144
Bit
(0x79)
(0x78)
Read/Write
Initial Value
ADCn[mV]
Cell
for details. The absolute temperature in Kelvin is given by:
n
[mV]
15
R
R
–
7
0
0
=
----- - (VADCH/L VADC ADCn Offset)
10
1
=
⋅
(VADCH/L VADC Cell
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- -
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
14
R
R
–
6
0
0
–
–
13
R
R
–
5
0
0
12
n
R
R
–
4
0
0
Offset)
VADC[7:0]
16384
”Reading the Signature Row from Software”
⋅
11
16384
VADC Cell
3
R
R
0
0
⋅
ATmega8HVA/16HVA
VADC ADCn Gain Calibration Word
10
R
R
0
2
0
n
VADC[11:8]
Gain Calibration Word
R
R
9
1
0
0
R
R
8
0
0
0
VADCH
VADCL
115