ATmega8HVA Atmel Corporation, ATmega8HVA Datasheet - Page 112

• Manufacturer Part Number: ATmega8HVA
• Manufacturer: Atmel Corporation

Specifications of ATmega8HVA

• Flash (kbytes): 8 Kbytes
• Pin Count: 28
• Max. Operating Frequency: 4 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -20 to 85
• I/o Supply Class: 1.8 to 9.0
• Operating Voltage (vcc): 1.8 to 9.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

20. Voltage ADC – 5-channel General Purpose 12-bit Sigma-Delta ADC
20.1
20.2
20.3
112
Features
Overview
Operation
ATmega8HVA/16HVA
•
•
•
•
•
•
The ATmega8HVA/16HVA features a 12-bit Sigma-Delta ADC.
The Voltage ADC (V-ADC) is connected to five different sources through the Input Multiplexer.
There are two differential channels for Cell Voltage measurements. These channels are scaled
0.2x to comply with the Full Scale range of the V-ADC. In addition there are three single ended
channels referenced to SGND. One channel is for measuring the internal temperature sensor
VPTAT and two channels for measuring the voltage at ADC0 and ADC1.
When the V-ADC is not used, power consumption can be minimized by writing the PRVADC bit
in PRR0 to one. See
the PRVADC bit.
Figure 20-1. Voltage ADC Block Schematic
To enable V-ADC conversions, the V-ADC Enable bit, VADEN, in V-ADC Control and Status
Register – VADCSR must be set. If this bit is cleared, the V-ADC will be switched off, and any
ongoing conversions will be terminated. The V-ADC is automatically disabled in Power-save and
12-bit Resolution
519µs Conversion Time @ 1 MHz clk
Two Differential Input Channels for Cell Voltage Measurements
Three Single Ended Input Channels
0.2x Pre-scaling of Cell Voltages
Interrupt on V-ADC Conversion Complete
VTEMP
ADC1
ADC0
PV2
PV1
NV
Note:
The shaded signals are scaled by 0.2,
other signals are scaled by 1.0
”PRR0 – Power Reduction Register 0” on page 39
INPUT
MUX
VADC
SIGMA-DELTA ADC
VREF
V-ADC MULTIPLEXER
8-BIT DATA BUS
V-ADC CONTROL
SEL. REG (VADMUX)
12-BIT
SGND
V-ADC CONVERSION COMPLETE IRQ
STATUS REG (VADCSR)
V-ADC DATA REGISTER
V-ADC CONTROL AND
(VADCL/ADCH)
for details on how to use
8024A–AVR–04/08