C8051F502-IMR Silicon Laboratories Inc, C8051F502-IMR Datasheet - Page 225

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C8051F502-IMR

Manufacturer Part Number
C8051F502-IMR
Description
MCU 8-Bit C8051F50x 8051 CISC 64KB Flash 2.5V/3.3V/5V 32-Pin QFN EP T/R
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F502-IMR

Package
32QFN EP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Ram Size
4.25 KB
Program Memory Size
64 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
25
Interface Type
I2C/SPI/UART
On-chip Adc
32-chx12-bit
Operating Temperature
-40 to 125 °C
Number Of Timers
4

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0
SFR Definition 22.1. CAN0CFG: CAN Clock Configuration
SFR Address = 0x92; SFR Page = 0x0C
Reset
Name
Bit
7:2
1:0 SYSDIV[1:0] CAN System Clock Divider Bits.
Type
Bit
Unused
Name
Unused
R
7
0
Read = 000000b; Write = Don’t Care.
The CAN controller clock is derived from the CIP-51 system clock. The CAN control-
ler clock must be less than or equal to 25 MHz.
00: CAN controller clock = System Clock/1.
01: CAN controller clock = System Clock/2.
10: CAN controller clock = System Clock/4.
11: CAN controller clock = System Clock/8.
Unused
R
0
6
Unused
R
5
0
Unused
Rev. 1.2
R
4
0
Function
Unused
R
3
0
C8051F50x/F51x
Unused
R
2
0
1
0
SYSDIV[1:0]
R/W
0
0
225

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