C8051F502-IMR Silicon Laboratories Inc, C8051F502-IMR Datasheet - Page 215

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C8051F502-IMR

Manufacturer Part Number
C8051F502-IMR
Description
MCU 8-Bit C8051F50x 8051 CISC 64KB Flash 2.5V/3.3V/5V 32-Pin QFN EP T/R
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F502-IMR

Package
32QFN EP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Ram Size
4.25 KB
Program Memory Size
64 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
25
Interface Type
I2C/SPI/UART
On-chip Adc
32-chx12-bit
Operating Temperature
-40 to 125 °C
Number Of Timers
4

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0
LIN Register Definition 21.8. LIN0SIZE: LIN0 Message Size Register
Indirect Address = 0x0B
Reset
Name
Bit
6:4
3:0
Type
7
Bit
LINSIZE[3:0] Data Field Size.
ENHCHK
ENHCHK
Unused
Name
R/W
7
0
Checksum Selection Bit.
0: Use the classic, specification 1.3 compliant checksum. Checksum covers the
data bytes.
1: Use the enhanced, specification 2.0 compliant checksum. Checksum covers data
bytes and protected identifier.
Read = 000b; Write = Don’t Care
0000: 0 data bytes
0001: 1 data byte
0010: 2 data bytes
0011: 3 data bytes
0100: 4 data bytes
0101: 5 data bytes
0110: 6 data bytes
0111: 7 data bytes
1000: 8 data bytes
1001-1110: RESERVED
1111: Use the ID[1:0] bits (LIN0ID[5:4]) to determine the data length.
R
6
0
R
5
0
Rev. 1.2
R
4
0
Function
3
0
C8051F50x/F51x
2
0
LINSIZE[3:0]
R/W
1
0
0
0
215

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