C8051F502-IMR Silicon Laboratories Inc, C8051F502-IMR Datasheet - Page 154

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C8051F502-IMR

Manufacturer Part Number
C8051F502-IMR
Description
MCU 8-Bit C8051F50x 8051 CISC 64KB Flash 2.5V/3.3V/5V 32-Pin QFN EP T/R
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F502-IMR

Package
32QFN EP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Ram Size
4.25 KB
Program Memory Size
64 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
25
Interface Type
I2C/SPI/UART
On-chip Adc
32-chx12-bit
Operating Temperature
-40 to 125 °C
Number Of Timers
4

Available stocks

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C8051F50x/F51x
18.4.2. Non-multiplexed Configuration
In Non-multiplexed mode, the Data Bus and the Address Bus pins are not shared. An example of a Non-
multiplexed Configuration is shown in Figure 18.2. See Section “18.6.1. Non-Multiplexed Mode” on
page 158 for more information about Non-multiplexed operation.
154
E
M
I
F
A[15:0]
D[7:0]
/WR
/RD
Figure 18.2. Non-multiplexed Configuration Example
ADDRESS BUS
DATA BUS
Rev. 1.2
(Optional)
V
DD
8
A[15:0]
I/O[7:0]
CE
WE
OE
64 K X 8
SRAM

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