C8051F502-IMR Silicon Laboratories Inc, C8051F502-IMR Datasheet - Page 171

• Manufacturer Part Number: C8051F502-IMR
• Description: MCU 8-Bit C8051F50x 8051 CISC 64KB Flash 2.5V/3.3V/5V 32-Pin QFN EP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F502-IMR

• Package: 32QFN EP
• Device Core: 8051
• Family Name: C8051F50x
• Maximum Speed: 50 MHz
• Ram Size: 4.25 KB
• Program Memory Size: 64 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/UART
• On-chip Adc: 32-chx12-bit
• Operating Temperature: -40 to 125 °C
• Number Of Timers: 4

SFR Definition 19.5. CLKMUL: Clock Multiplier
SFR Address = 0x97; SFR Page = 0x0F;
Notes: The maximum system clock is 50 MHz, and so the Clock Multiplier output should be scaled accordingly. 
Reset
Name
Bit
4:2
1:0
Type
7
6
5
Bit
MULSEL[1:0] Clock Multiplier Input Select.
If Internal Oscillator x 2 or External Oscillator x 2 is selected using the MULSEL bits, MULDIV[2:0] is ignored.
MULDIV[2:0]
MULRDY
MULINIT
MULEN
MULEN
Name
R/W
7
0
MULINIT
Clock Multiplier Enable.
0: Clock Multiplier disabled.
1: Clock Multiplier enabled.
Clock Multiplier Initialize.
This bit is 0 when the Clock Multiplier is enabled. Once enabled, writing a 1 to this
bit will initialize the Clock Multiplier. The MULRDY bit reads 1 when the Clock Mul-
tiplier is stabilized.
Clock Multiplier Ready.
0: Clock Multiplier is not ready.
1: Clock Multiplier is ready (PLL is locked).
Clock Multiplier Output Scaling Factor.
000: Clock Multiplier Output scaled by a factor of 1.
001: Clock Multiplier Output scaled by a factor of 1.
010: Clock Multiplier Output scaled by a factor of 1.
011: Clock Multiplier Output scaled by a factor of 2/3*.
100: Clock Multiplier Output scaled by a factor of 2/4 (1/2).
101: Clock Multiplier Output scaled by a factor of 2/5*.
110: Clock Multiplier Output scaled by a factor of 2/6 (1/3).
111: Clock Multiplier Output scaled by a factor of 2/7*.
*Note: The Clock Multiplier output duty cycle is not 50% for these settings.
These bits select the clock supplied to the Clock Multiplier
MULSEL[1:0]
R/W
0
6
00
01
10
11
MULRDY
R
5
0
Selected Input Clock
External Oscillator
External Oscillator
Internal Oscillator
Internal Oscillator
Rev. 1.2
4
0
MULDIV[2:0]
Function
R/W
3
0
C8051F50x/F51x
2
0
Clock Multiplier Output
for MULDIV[2:0] = 000b
External Oscillator x 2
External Oscillator x 4
Internal Oscillator x 2
Internal Oscillator x 4
1
MULSEL[1:0]
0
R/W
0
0
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