C8051F502-IMR Silicon Laboratories Inc, C8051F502-IMR Datasheet - Page 218

• Manufacturer Part Number: C8051F502-IMR
• Description: MCU 8-Bit C8051F50x 8051 CISC 64KB Flash 2.5V/3.3V/5V 32-Pin QFN EP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F502-IMR

• Package: 32QFN EP
• Device Core: 8051
• Family Name: C8051F50x
• Maximum Speed: 50 MHz
• Ram Size: 4.25 KB
• Program Memory Size: 64 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/UART
• On-chip Adc: 32-chx12-bit
• Operating Temperature: -40 to 125 °C
• Number Of Timers: 4

C8051F50x/F51x
22. Controller Area Network (CAN0)
Important Documentation Note : The Bosch CAN Controller is integrated in the C8051F500/2/4/6/8-F510
devices. This section of the data sheet gives a description of the CAN controller as an overview and offers
a description of how the Silicon Labs CIP-51 MCU interfaces with the on-chip Bosch CAN controller. In
order to use the CAN controller, refer to Bosch’s C_CAN User’s Manual as an accompanying manual to
the Silicon Labs’ data sheet.
The C8051F500/2/4/6/8-F510 devices feature a Control Area Network (CAN) controller that enables serial
communication using the CAN protocol. Silicon Labs CAN facilitates communication on a CAN network in
accordance with the Bosch specification 2.0A (basic CAN) and 2.0B (full CAN). The CAN controller con-
sists of a CAN Core, Message RAM (separate from the CIP-51 RAM), a message handler state machine,
and control registers. Silicon Labs CAN is a protocol controller and does not provide physical layer drivers
(i.e., transceivers). Figure 22.1 shows an example typical configuration on a CAN bus.
Silicon Labs CAN operates at bit rates of up to 1 Mbit/second, though this can be limited by the physical
layer chosen to transmit data on the CAN bus. The CAN processor has 32 Message Objects that can be
configured to transmit or receive data. Incoming data, message objects and their identifier masks are
stored in the CAN message RAM. All protocol functions for transmission of data and acceptance filtering is
performed by the CAN controller and not by the CIP-51 MCU. In this way, minimal CPU bandwidth is
needed to use CAN communication. The CIP-51 configures the CAN controller, accesses received data,
and passes data for transmission via Special Function Registers (SFRs) in the CIP-51.
Silicon Labs MCU
CAN Protocol Device
CAN Protocol Device
CANTX
CANRX
CAN
CAN
CAN
Transceiver
Transceiver
Transceiver
Isolation/Buffer (Optional)
Isolation/Buffer (Optional)
Isolation/Buffer (Optional)
CAN_H
R
R
CAN_L
Figure 22.1. Typical CAN Bus Configuration
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