PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 72

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
12NC 9397 750 14321
Product data sheet
10.3.1 Do DDR Devices Require Termination?
10.3.2 What if I really want to use termination for the PNX1500?
10.4 Package Handling, Soldering and Thermal Properties
The ball assignment implies that the two outside rows of balls are routed on a
different board layer than the next two rows of balls. This is recommended to reduce
the skew. The DQS lines are the exception since they are located on the outside row
for better package signal integrity.
A 10-22
placed as close as possible to the PNX1500 clock output pins. In addition a 100
shunting both memory clocks, i.e. MM_CLK and MM_CLK#, will reduce the swing of
the signals and improve signal integrity.
No other termination is required at board level to achieve maximum speed if these
rules are strictly followed.
Above DDR333, i.e. MM_CLK of 166 MHz, the 183 or 200 MHz operating speeds (i.e.
DDR400) are only available for a maximum of 2 loads.
Most DDR devices are meant to drive very long and highly loaded track lines. Their
drivers are usually very strong and could use a 22
and dqs lines on the DDR device’s end.
It is possible to parallel terminate each line to a termination voltage with a 50
resistor for the 200 MHz operation (i.e. DDR400). The resistor should be placed as
close as possible to the intersection of the leg of ‘T’ and the bar of the ‘T’ (this applies
when the signal has two or more loads). For single loaded tracks and bi-directional
signals, the parallel termination resistor should be placed about 50% of the way to the
DDR SDRAM device. For unidirectional signals and single loaded tracks, the
termination should be placed after the pin of DDR SDRAM device. In this case, the
VTT supply must be carefully designed with very wide tracks since the current
through that power supply is very high due to the termination and its active current
consumption over 80+ pins.
MM_CKE must not be parallel terminated since it requires a 0V level at initialization
time.
Similarly for signal integrity purpose, it is possible to only series terminate the
address, the command lines, and the data lines (at the PNX1500 side). There is no
need for series termination if the parallel termination was chosen.
Up to date package information can be found at
http://www.philipslogic.com/packaging/handbook
series resistor is recommended on the two clock lines. They need to be
Rev. 2 — 1 December 2004
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
Chapter 1: Integrated Circuit Data
series resistors on the data/dqm
PNX15xx Series
1-46