PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 700

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
12NC 9397 750 14321
Product data sheet
5.4.1 Overview
5.4.2 Device Driver Sets Up Descriptors and Data
5.4 Transmit process
The receive function is enabled in two steps. The receive DMA manager must be
enabled and the Receive Datapath of MII Interface must be enabled. To prevent
overflow in the receive DMA engine, it should be enabled by setting the RxEnable bit
in the Command register before enabling the Receive Datapath in the MII Interface by
setting the RECEIVE_ENABLE bit in the MAC1 register.
The non-real-time and real-time transmit DMA engine can be enabled any time by
setting the TxEnable and TxRtEnable bits in the Command register.
Before enabling the datapaths, several options can be programmed, such as
automatic flow control, transmit-to-receive loop-back for verification, full- or
half-duplex modes, and so forth.
Base addresses of FIFOs and FIFO sizes cannot be modified without soft reset of the
receive and Transmit Datapaths.
This section outlines the transmission process. The LAN100 has two Transmit
Datapaths which can be configured as real-time, non-real-time, high- or low priority.
For more information on non-real-time and low- or high-priority transmission, please
refer to
real-time/low-priority Transmit Datapath and the prefix Tx refers to the
non-real-time/high-priority Transmit Datapath.
Before setting up one or more descriptors for transmission, the device driver should
select if the packet should go to the real-time or non-real-time FIFO. Real-time traffic
or low-priority QoS traffic should go to the real-time Tx descriptor FIFO while
non-real-time or high-priority QoS traffic should go to the non-real-time Tx descriptor
FIFO. If the selected descriptor FIFO is full, the device driver should wait for the FIFO
to become not full before writing the descriptor in the FIFO. If the selected FIFO is not
full, the device driver should use the descriptor indexed by TxProduceIndex from the
array pointed to by TxDescriptor (or the descriptor indexed by TxRtProduceIndex
from the TxRtDescriptor array for real-time/low priority QoS).
The Packet pointer in the descriptor is set to point to a data packet or packet fragment
to be transmitted. The Size field in the Command field of the descriptor should be set
to the number of bytes in the fragment buffer, –1 encoded. Additional control
information can be indicated in the Control field in the descriptor (including bits for
Interrupt, Last, CRC, and Pad). The time-stamp field in the descriptor must be
initialized for real-time transmissions.
After writing the descriptor, it must be handed over to the hardware by incrementing
(and possibly wrapping) the TxProduceIndex or TxRTProduceIndex registers.
If the Transmit Datapath is disabled, the device driver should not forget to enable the
(non-) real-time Transmit Datapath by setting the TxEnable or TxRtEnable bit in the
Command register.
Section
5.8. In the following subsections the prefix TxRt refers to the
Rev. 2 — 1 December 2004
Chapter 23: LAN100 — Ethernet Media Access Controller
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
PNX15xx Series
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