PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 566

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
Table 6: SPDIF Input Registers
12NC 9397 750 14321
Product data sheet
Bit
Offset 0x10 A000
31:9
11:8
7
6:5
4:3
Symbol
Unused
GL_FILTER
UCBITS_SEL
CHAN_MODE[1:0]
SAMP_MODE[1:0]
5.2 Register Table
SPDI_CTL
Acces
s
R/W
R/W
R/W
R/W
Value
-
0
0
0
0
Rev. 2 — 1 December 2004
Description
Input glitch filter control. These bits control the rejection of a glitch
on the SPDI interface.
User/Channel status bits select. Selects the set of subframes from
which the user and channel status bits are extracted and written to
the SPDI_UBITSx and SPDI_CBITSx registers. This bit is activated
only on a block boundary, meaning that the bit can be changed at
any time via software, but the update of the SPDI_UBITSx and
SPDI_CBITSx registers with the new information will wait until a
complete block has been received at the SPDIF Input.
00 = Capture stereo left/right sample pairs (Default).
01 = Capture mono primary (subframe 1) channel.
10 = Capture mono secondary (subframe 2) channel.
11 = Reserved
Note: The channel mode should only be changed while capture is
disabled (i.e. CAP_ENABLE = 0).
00 = 16-bit mode. Subframe bits [27:12] inclusive are selected and
stored. Hardware stores a single 16-bit word per subframe. If audio
samples are actually larger than 16 bits, the most significant 16 bits
of the audio sample will be selected and stored.
01= 32-bit mode. Subframe bits [27:4] inclusive are selected and
stored subject to SMASK. A 32-bit word is formed by bitwise
masking the sample (subject to the value of
SPDI_SMPMASK.SMASK) and padding ‘0’ bits to the least
significant end of the 24 bits. The resultant 32-bit words are of the
form: 0xnnnnmm00 where the ns are the 16 subframe bits [27:12]
and the ms are the eight masked subframe bits [11:4]. This
provides for any audio sample size from 17 to 24 bits. (See the
SPDI_SMPMASK register description for operation of the SMASK
feature). SMASK only applies for this sample mode.
10 = Raw capture mode. The entire subframe is captured and
stored. The bi-phase portion of the subframe (i.e., bits [31:4]) are
decoded into binary. Bits [3:0] are replaced with a code. The entire
32 bits are then stored as one unit.
11 = Reserved
Note: The sample mode should only be changed while capture is
disabled (i.e., CAP_ENABLE = ‘0’).
0000 = The Glitch Rejection Filter is disabled.
0001 .. 1111 = An incoming signal transition must remain stable
for (programmed value + 1) rising edges of OSC_CLK, otherwise
it is rejected as a glitch.
0 = subframe 1 is selected, user and channel status bits are
extracted/written to UBITSx and CBITSx registers.
1 = subframe 2 is selected. User and channel status bits are
extracted/written to UBITSx and CBITSx registers.
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
PNX15xx Series
Chapter 18: SPDIF Input
18-17