F84045 Asiliant Technologies, F84045 Datasheet - Page 68

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F84045

Manufacturer Part Number
F84045
Description
Manufacturer
Asiliant Technologies
Datasheet

Specifications of F84045

Lead Free Status / Rohs Status
Not Compliant

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F84045
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Index
0B
Revision 1.0
index
0B
0
1
2
3
4
5
6
7
arb control
function
Bits
VL Arbitration and WBACK# control.
of the state of the DGNT# at power up. Typical setting = 00h for minimum system with WT CPU.
Arbitration lock. Used to prevent the CPU from going into HLDA while switching the CPU clock
New Write Back mode
LREQ1# input enable. Bit 3 must be a 1 for this function to work properly.
LREQ1# / LGNT1# Select
LREQ2# input enable. Bit 6 must be a 1for this function to work properly.
IOCS# input enable. Bit 6 must be a 1 for this function to work properly.
SA17:19 function enable/disable. Default is the invert of DGNT# at power up. Can be changed by
SA17:19 indicator pin. This input bit is the INVERTED status of the DGNT# signal at power up. It
2/10/95
(required by Intel S-Series CPUs).
software. To enable the proper mode at power-up (probably essential for successful BIOS startup
from ROM), the DGNT# pin needs a pull-up or pull-down resistor.
cannot be changed by software. Bit 6 will also be set to this value at power up. Bit 6 actually
determines the functions of the SA17-19 pins.
sa default
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
D7
Description
0
HOLD will not go high. If HOLD is already high, the arbitration logic will operate
4035 WBACK# mode (HOLD goes low when WBACK# is low)
4045 WBACK# mode (HOLD pul sed and A8:9, & A17:23 floated when WBACK#
LREQ1# input disabled.
LREQ1# input enabled.
SLOW# and FLUSH# functions provided on pins 4 and 12
LREQ1# and LGNT1# functions provided on pins 4 and 12
LREQ2# input disabled.
LREQ2# input enabled.
IOCS# input disabled. Internal I/O is decoded from A0:9 only.
IOCS# input enabled. Internal I/O conditioned with IOCS# low.
SA17:19 driven on pins 60, 58, and 57. (DGNT# pulled up.)
LREQ2# on pin 60, LGNT2# on pin 58, and IOCS# on pin 57. (DGNT# pulled
DGNT# was high. System configured for SA17:19 mode.
DGNT# was low. System configured for LREQ2# / LGNT2# and IOCS# mode.
sa function
normally until HOLD goes back low.
goes low).
down.)
D6
Subject to change without notice
iocs enab
D5
Normal operation
lreq3# enab
67
D4
Default = xx00 0000 (the 'x's are set by the invert
slo/flush
func
D3
lreq1# enab
D2
wb mode
Configuration Registers
Preliminary
D1
arb lock
D0
CS4041

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