MC9S08GT16CFB Freescale Semiconductor, MC9S08GT16CFB Datasheet - Page 97

• Manufacturer Part Number: MC9S08GT16CFB
• Manufacturer: Freescale Semiconductor

Specifications of MC9S08GT16CFB

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: SCI/SPI
• Program Memory Type: Flash
• Program Memory Size: 16KB
• Total Internal Ram Size: 1KB
• # I/os (max): 36
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.08V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Chapter 7 Internal Clock Generator (ICG) Module
The MC9S08GB/GT microcontroller provides one internal clock generation (ICG) module to create the
system bus frequency. All functions described in this section are available on the MC9S08GB/GT
microcontroller. The EXTAL and XTAL pins share port G bits 2 and 1, respectively. Analog supply lines
V
the ICG may be found in
Freescale Semiconductor
DDA
ICG
and V
SSA
ICGLCLK*
ICGERCLK
FFE
* ICGLCLK is the alternate BDC clock source for the MC9S08GB/GT.
Freescale Semiconductor recommends that FLASH location $FFBE be
reserved to store a nonvolatile version of ICGTRM. This will allow
debugger and programmer vendors to perform a manual trim operation and
store the resultant ICGTRM value for users to access at a later time.
ICGOUT
are internally derived from the MCU’s V
CPU
÷
CONTROL
2
SYSTEM
LOGIC
÷
Appendix A, “Electrical
2
FIXED FREQ CLOCK (XCLK)
Figure 7-1. System Clock Distribution Diagram
RTI
BUSCLK
MC9S08GB/GT Data Sheet, Rev. 2.3
BDC
TPM1
NOTE
Characteristics.”
TPM2
DD
and V
ATD has min and max
frequency requirements.
See
and
Characteristics.
IIC1
SS
Appendix A, “Electrical
Chapter 1,
ATD1
pins. Electrical parametric data for
SCI1
“Introduction”
RAM
SCI2
FLASH has frequency
requirements for program
and erase operation.
See
Characteristics.
FLASH
Appendix A, “Electrical
SPI1
97