MC9S08GT16CFB Freescale Semiconductor, MC9S08GT16CFB Datasheet - Page 101

MC9S08GT16CFB

Manufacturer Part Number
MC9S08GT16CFB
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S08GT16CFB

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SCI/SPI
Program Memory Type
Flash
Program Memory Size
16KB
Total Internal Ram Size
1KB
# I/os (max)
36
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.08V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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7.1.2
This is a high-level description only. Detailed descriptions of operating modes are contained in
Section 7.3, “Functional
7.2
7.2.1
Table 7-1
Freescale Semiconductor
Mode 1 — Off
The output clock, ICGOUT, is static. This mode may be entered when the STOP instruction is
executed.
Mode 2 — Self-clocked (SCM)
Default mode of operation that is entered out of reset. The ICG’s FLL is open loop and the digitally
controlled oscillator (DCO) is free running at a frequency set by the filter bits.
Mode 3 — FLL engaged internal (FEI)
In this mode, the ICG’s FLL is used to create frequencies that are programmable multiples of the
internal reference clock.
— FLL engaged internal unlocked is a transition state which occurs while the FLL is attempting
— FLL engaged internal locked is a state which occurs when the FLL detects that the DCO is
Mode 4 — FLL bypassed external (FBE)
In this mode, the ICG is configured to bypass the FLL and use an external clock as the clock source.
Mode 5 — FLL engaged external (FEE)
The ICG’s FLL is used to generate frequencies that are programmable multiples of the external
clock reference.
— FLL engaged external unlocked is a transition state which occurs while the FLL is attempting
— FLL engaged external locked is a state which occurs when the FLL detects that the DCO is
External Signal Description
shows the user-accessible signals available for the ICG.
Modes of Operation
to lock. The FLL DCO frequency is off target and the FLL is adjusting the DCO to match the
target frequency.
locked to a multiple of the internal reference.
to lock. The FLL DCO frequency is off target and the FLL is adjusting the DCO to match the
target frequency.
locked to a multiple of the internal reference.
Overview
Name
EXTAL
XTAL
Description."
MC9S08GB/GT Data Sheet, Rev. 2.3
External clock/oscillator input
Table 7-1. Signal Properties
Oscillator output
Function
Analog output
Reset State
Analog input
External Signal Description
101

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