MC9S08GT16CFB Freescale Semiconductor, MC9S08GT16CFB Datasheet - Page 193
MC9S08GT16CFB
Manufacturer Part Number
MC9S08GT16CFB
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S08GT16CFB.pdf
(290 pages)
Specifications of MC9S08GT16CFB
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SCI/SPI
Program Memory Type
Flash
Program Memory Size
16KB
Total Internal Ram Size
1KB
# I/os (max)
36
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.08V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant
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12.3.1
To accommodate a wide variety of synchronous serial peripherals from different manufacturers, the SPI
system has a clock polarity (CPOL) bit and a clock phase (CPHA) control bit to select one of four clock
formats for data transfers. CPOL selectively inserts an inverter in series with the clock. CPHA chooses
between two different clock phase relationships between the clock and data.
Figure 12-5
for reference with bit 1 starting at the first SPSCK edge and bit 8 ending one-half SPSCK cycle after the
sixteenth SPSCK edge. The MSB first and LSB first lines show the order of SPI data bits depending on the
setting in LSBFE. Both variations of SPSCK polarity are shown, but only one of these waveforms applies
for a specific transfer, depending on the value in CPOL. The SAMPLE IN waveform applies to the MOSI
input of a slave or the MISO input of a master. The MOSI waveform applies to the MOSI output pin from
a master and the MISO waveform applies to the MISO output from a slave. The SS OUT waveform applies
to the slave select output from a master (provided MODFEN and SSOE = 1). The master SS output goes
to active low one-half SPSCK cycle before the start of the transfer and goes back high at the end of the
eighth bit time of the transfer. The SS IN waveform applies to the slave select input of a slave.
Freescale Semiconductor
(MISO OR MOSI)
(MASTER OUT)
(REFERENCE)
(SLAVE OUT)
SAMPLE IN
MSB FIRST
BIT TIME #
(CPOL = 0)
(CPOL = 1)
LSB FIRST
(MASTER)
(SLAVE)
SS OUT
SPSCK
SPSCK
SS IN
MOSI
MISO
SPI Clock Formats
shows the clock formats when CPHA = 1. At the top of the figure, the eight bit times are shown
Figure 12-5. SPI Clock Formats (CPHA = 1)
BIT 7
BIT 0
1
MC9S08GB/GT Data Sheet, Rev. 2.3
BIT 6
BIT 1
2
...
...
...
BIT 2
BIT 5
6
BIT 1
BIT 6
7
Functional Description
BIT 0
BIT 7
8
193
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