MC9S08GT16CFB Freescale Semiconductor, MC9S08GT16CFB Datasheet - Page 183
MC9S08GT16CFB
Manufacturer Part Number
MC9S08GT16CFB
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S08GT16CFB.pdf
(290 pages)
Specifications of MC9S08GT16CFB
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SCI/SPI
Program Memory Type
Flash
Program Memory Size
16KB
Total Internal Ram Size
1KB
# I/os (max)
36
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.08V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant
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OR — Receiver Overrun Flag
NF — Noise Flag
FE — Framing Error Flag
PF — Parity Error Flag
11.10.5 SCI x Status Register 2 (SCIxS2)
This register has one read-only status flag. Writes have no effect.
Freescale Semiconductor
OR is set when a new serial character is ready to be transferred to the receive data register (buffer), but
the previously received character has not been read from SCIxD yet. In this case, the new character
(and all associated error information) is lost because there is no room to move it into SCIxD. To clear
OR, read SCIxS1 with OR = 1 and then read the SCI data register (SCIxD).
The advanced sampling technique used in the receiver takes seven samples during the start bit and
three samples in each data bit and the stop bit. If any of these samples disagrees with the rest of the
samples within any bit time in the frame, the flag NF will be set at the same time as the flag RDRF gets
set for the character. To clear NF, read SCIxS1 and then read the SCI data register (SCIxD).
FE is set at the same time as RDRF when the receiver detects a logic 0 where the stop bit was expected.
This suggests the receiver was not properly aligned to a character frame. To clear FE, read SCIxS1
with FE = 1 and then read the SCI data register (SCIxD).
PF is set at the same time as RDRF when parity is enabled (PE = 1) and the parity bit in the received
character does not agree with the expected parity value. To clear PF, read SCIxS1 and then read the
SCI data register (SCIxD).
1 = Receive overrun (new SCI data lost).
0 = No overrun.
1 = Noise detected in the received character in SCIxD.
0 = No noise detected.
1 = Framing error.
0 = No framing error detected. This does not guarantee the framing is correct.
1 = Parity error.
0 = No parity error.
Reset:
Read:
Write:
Bit 7
Figure 11-10. SCI x Status Register 2 (SCIxS2)
0
0
= Unimplemented or Reserved
MC9S08GB/GT Data Sheet, Rev. 2.3
6
0
0
5
0
0
4
0
0
3
0
0
2
0
0
SCI Registers and Control Bits
1
0
0
Bit 0
RAF
0
183
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