PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 272

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PSB2115FV1.2D

Manufacturer Part Number
PSB2115FV1.2D
Description
Manufacturer
Lantiq
Datasheet

Specifications of PSB2115FV1.2D

Lead Free Status / Rohs Status
Supplier Unconfirmed
An interrupt is only generated to the IPAC, if the corresponding mask bit in MASK is
reset.
4.4.5
Value after reset: 00
ACFG
OD7 - OD2 ... Output Driver Select for AUX7 - AUX2
0: output is open drain
1: output is push/pull
Note: The ODx configuration is only valid, if the corresponding output is enabled in the
EL1, EL0 ... Edge / Level Triggered Interrupt Input for INT1, INT0
0: a negative level ...
1: a negative edge ... on INT1/0 (pins AUX7/6) generates an interrupt to the IPAC.
Note: This configuration is only valid, if the corresponding output enable bit in AOE is
Semiconductor Group
AOE register.
AUX2 is only available in TE mode and not in LT modes.
In LT modes AUX 3-5 is only available if the PCM interface is disabled
(PCFG:PLD=1).
In TE mode the host must set PCFG:PLD=1 before the output driver is selected.
disabled.
ACFG - Auxiliary Interface Configuration (Read/Write)
7
OD7
OD6
H
OD5
OD4
272
OD3
OD2
Detailed Register Description
EL1
0
EL0
PSB 2115
PSF 2115
11.97
(C3)

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