PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 21

• Manufacturer Part Number: PSB2115FV1.2D
• Manufacturer: Lantiq

Specifications of PSB2115FV1.2D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Pin No. Symbol Input (I)
32
33
Semiconductor Group
AUX1
AUX2
Output (O)
I/O
I/O
Function
Auxiliary Port 1
TE-Mode: DRQRA (output)
DMA Request Receiver (channel A)
The receiver of the IPAC requests DMA data transfer
by activating this line.
The DRQRA remains HIGH as long as the receive
FIFO requires data transfer, thus always blocks of data
(64, 32, 16, 8 or 4 bytes) are transferred.
DRQRA is deactivated immediately following the falling
edge of the last read cycle.
LT-T/LT-S Mode: CH1 (input)
IOM-2 Channel Select 1
Together with CH0 (pin AUX0) and CH2 (pin AUX2),
this pin selects one of eight channels on the IOM-2
interface.
Auxiliary Port 2
TE-Mode: AUX2 (input)
This pin is programmable as general input/output. The
state of the pin can be read from (input) / written to
(output) a register.
TE-Mode: INT (output)
This high active signal is activated when the IPAC
requests an interrupt (invers polarity of INT line).
LT-T/LT-S Mode: CH2 (input)
IOM-2 Channel Select 2
Together with CH0 (pin AUX0) and CH1 (pin AUX1),
this pin selects one of eight channels on the IOM-2
interface.
21
PSB 2115
PSF 2115
Overview
11.97