PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 210

• Manufacturer Part Number: PSB2115FV1.2D
• Manufacturer: Lantiq

Specifications of PSB2115FV1.2D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

PSB 2115
PSF 2115
Operational Description
G4 wait for DR
Final state after a deactivation request. The IPAC remains in this state until an
“acknowledgment” to DI (DC) is issued.
Test Mode 1
Single alternating pulses are sent on the S/T-interface (2-kHz repetition rate).
Test Mode 2
Continuous alternating pulses are sent on the S/T-interface (96 kHz).
3.6.6
Command/Indicate Channel
Structure
4 bit wide, located at bit positions 26-29 in each time-slot (assuming that bit 0 is the first
bit).
Verification
Double last-look criterion. A new command or indication will be recognized as valid after
it has been detected in two successive IOM frames.
Codes
Both commands and indications depend on the IPAC mode and the data direction. The
table below presents all defined C/I codes. A command needs to be applied continuously
until the desired action has been initiated. Indications are strictly state orientated. Refer
to the state diagrams in the previous sections for commands and indications applicable
in various states.
Semiconductor Group
210
11.97