PIC16F913-I/SP Microchip Technology Inc., PIC16F913-I/SP Datasheet - Page 92

• Manufacturer Part Number: PIC16F913-I/SP
• Description: 28 PIN, 7 KB FLASH, 352 RAM, 25 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F913-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F917/916/914/913
7.0
The Timer2 module timer has the following features:
• 8-bit timer (TMR2 register)
• 8-bit period register (PR2)
• Readable and writable (both registers)
• Software programmable prescaler (1:1, 1:4, 1:16)
• Software programmable postscaler (1:1 to 1:16)
• Interrupt on TMR2 match with PR2
Timer2 has a control register shown in Register 7-1.
TMR2 can be shut-off by clearing control bit TMR2ON
(T2CON<2>)
Figure 7-1 is a simplified block diagram of the Timer2
module. The prescaler and postscaler selection of
Timer2 are controlled by this register.
REGISTER 7-1:
DS41250E-page 90
TIMER2 MODULE
bit 7
bit 6-3
bit 2
bit 1-0
to
minimize
bit 7
Unimplemented: Read as ‘0’
TOUTPS<3:0>: Timer2 Output Postscale Select bits
0000 =1:1 Postscale
0001 =1:2 Postscale
•
•
•
1111 =1:16 Postscale
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
T2CKPS<1:0>: Timer2 Clock Prescale Select bits
00 =Prescaler is 1
01 =Prescaler is 4
1x =Prescaler is 16
Legend:
R = Readable bit
- n = Value at POR
T2CON – TIMER2 CONTROL REGISTER (ADDRESS: 12
U-0
—
power
TOUTPS3
R/W-0
consumption.
TOUTPS2
R/W-0
Preliminary
W = Writable bit
‘1’ = Bit is set
TOUTPS1
R/W-0
7.1
Timer2 can be used as the PWM time base for the
PWM mode of the CCP module. The TMR2 register is
readable and writable, and is cleared on any device
Reset. The input clock (F
of 1:1, 1:4 or 1:16, selected by control bits T2CKPSx
(T2CON<1:0>). The match output of TMR2 goes
through a 4-bit postscaler (which gives a 1:1 to 1:16
scaling inclusive) to generate a TMR2 interrupt (latched
in flag bit TMR2IF, (PIR1<1>)).
The prescaler and postscaler counters are cleared
when any of the following occurs:
• A write to the TMR2 register
• A write to the T2CON register
• Any device Reset (Power-on Reset, MCLR Reset,
TMR2 is not cleared when T2CON is written.
Watchdog Timer Reset, or Brown-out Reset)
TOUTPS0 TMR2ON T2CKPS1 T2CKPS0
Timer2 Operation
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
© 2005 Microchip Technology Inc.
h
OSC
)
/4) has a prescale option
x = Bit is unknown
R/W-0
R/W-0
bit 0